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TPS78228DDCR Datasheet(PDF) 2 Page - Texas Instruments |
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TPS78228DDCR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 25 page TPS782xx SBVS115B – AUGUST 2008 – REVISED MAY 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) (2) PRODUCT VOUT TPS782xx yyy z XX is the nominal output voltage YYY is the package designator. Z is the tape and reel quantity (R = 3000, T = 250). (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. (2) Additional output voltage combinations are available on a quick-turn basis using innovative, factory EEPROM programming. Minimum-order quantities apply; contact your sales representative for details and availability ABSOLUTE MAXIMUM RATINGS (1) At TJ = –40°C to +125°C, unless otherwise noted. All voltages are with respect to GND. PARAMETER TPS782xx UNIT Input voltage range, VIN –0.3 to +6.0 V Enable –0.3 to VIN + 0.3V V Output voltage range, VOUT –0.3 to VIN + 0.3V V Maximum output current, IOUT Internally limited Output short-circuit duration Indefinite Total continuous power dissipation, PDISS See the Dissipation Ratings table Human body model (HBM) 2 kV ESD rating Charged device model (CDM) 500 V Operating junction temperature range, TJ –40 to +125 °C Storage temperature range, TSTG –55 to +150 °C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. DISSIPATION RATINGS DERATING FACTOR BOARD PACKAGE RqJC RqJA ABOVE TA = +25°C TA < +25°C TA = +70°C TA = +85°C High-K(1) DRV 20°C/W 65°C/W 15.4mW/°C 1540mW 845mW 615mW High-K(1) DDC 90°C/W 200°C/W 5.0mW/°C 500mW 275mW 200mW (1) The JEDEC high-K (2s2p) board used to derive this data was a 3-inch × 3-inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. 2 Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated |
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