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TS3V713EL Datasheet(PDF) 9 Page - Texas Instruments |
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TS3V713EL Datasheet(HTML) 9 Page - Texas Instruments |
9 / 20 page CL (see Note A) TEST CIRCUIT S1 2 × VDD Open GND RL RL NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low , except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. 50 Ω VG1 VDD DUT 50 Ω VIN 50 Ω VG2 50 Ω VI Input Generator Input Generator VO tPZL VOH -10% VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VDD/2 VDD/2 Output Control (VIN) VOH VOL +10% VOH VOL 0 V tPZH tPLZ tPHZ Output Waveform 2 S1 at GND (see Note B) Output Waveform 1 S1 at 2 x VDD (see Note B) VOL VO VI VO VDD/2 VDD/2 VDD RL S1 V∆ CL VDD Vin 3.3 V± 0.3 V 2 × VDD 200 Ω or 1 kΩ* GND 10 pF 0.3 V GND VDD 10 pF 0.3 V 3.3 V± 0.3 V TEST tPLZ/tPZL tPHZ/tPZH VDD_5 5 V± 0.5 V 5 V± 0.5 V R = 200 applies to all switch outputs R = 1 k applies to all buffer outputs L L * TS3V713EL www.ti.com SCDS312A – NOVEMBER 2010 – REVISED NOVEMBER 2010 PARAMETER MEASUREMENT INFORMATION (Enable and Disable Times) Figure 9. Test Circuit and Voltage Waveforms Copyright © 2010, Texas Instruments Incorporated 9 Product Folder Link(s): TS3V713EL |
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