TLK2500IRCP

1.6 Gbps to 2.5 Gbps TRANSCEIVER

SLLS356B – JUNE 1999 – REVISED JANUARY 2000

5

POST OFFICE BOX 655303

transmit interface (continued)

high-speed data output

The high speed data output driver consists of a differential pair (CML) that can be optimized for a particular

transmission line impedance and length. The line can be directly coupled or ac coupled. The drivers provide

pre-emphasis and de-emphasis. Pre-emphasis is a boost in the serial driver current occurring during a bit

transition (either high-to-low or low-to-high). This current is held for one bit time. De-emphasis is a reduction

in the serial driver current directly following a pre-emphasis event if there is not a transition after the

pre-emphasis event. De-emphasis can be held for multiple bit times if no transition occurs. Refer to Figure 10

and Figure 11 for termination details.

receive interface

The receiver portion of the TLK2500 accepts 8B/10B encoded differential serial data. The interpolator and clock

recovery circuit will lock to the data stream and extract the bit rate clock. This recovered clock is used to retime

the input data stream. The serial data is then aligned to two separate 10-bit word boundaries, 8B/10B decoded

and output on a 16 bit wide parallel bus synchronized to the extracted receive clock.

low-speed data bus

The receive bus interface drives 16 bit wide single-ended TTL parallel data at the RXD[0–15] pins. Data is valid

on the rising edge of RX_CLK when RX_DV is asserted high. The RX_CLK is used as the byte clock. The data,

enable and clock signals must be properly aligned as shown in Figure 3. Detailed timing information can be

found in the TTL output switching characteristics table.

RX_CLK

RXDn, RX_ER, RX_DV

tSETUP

tHOLD

Figure 3. Receive Timing Waveform

data reception latency

The serial-to-parallel data latency is the time from when the first bit arrives at the receiver until it is output in the

aligned parallel word with RXD0 received as first bit. The minimum latency is 76 bit times; the maximum is 107

bit times.