TMS320WP010

DIGITAL SIGNAL PROCESSOR

FOR AEC/LEC/ANS

SPRS040–OCTOBER 1995

7

POST OFFICE BOX 655303

– 0.3 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

– 0.3 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

– 0.3 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–40

°C to 85°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–55

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to VSS.

recommended operating conditions

MIN

NOM

MAX

UNIT

VDD

Supply voltage

4.75

5

5.25

V

VSS

Supply voltage

0

V

X2/CLKIN, CLKIN2

3

VDD + 0.3

VIH

High-level input voltage

CLKX1, CLKX2, CLKR1, CLKR2

2.5

VDD + 0.3

V

All others

2

VDD + 0.3

VIL

Low level input voltage

X2/CLKIN, CLKIN2, CLKX1, CLKX2, CLKR1, CLKR2

– 0.3

0.7

V

VIL

Low-level input voltage

All others

– 0.3

0.8

V

IOH

High-level output current (see Note 2)

– 300

µA

IOL

Low-level output current

2

mA

TC

Operating case temperature

0

85

°C

TA

Operating ambient temperature (industrial)

–40

85

°C

NOTE 2: Figure 3 shows the test load circuit and Figures 4 and 5 show the voltage reference levels.

electrical characteristics over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS†

MIN

TYP‡

MAX

UNIT

VOH

High-level output voltage (see Note 2)

IOH = MAX

2.4

3

V

VOL

Low-level output voltage (see Note 2)

IOL = MAX

0.3

0.6

V

IOZ

High impedance output current (VDD = MAX)

BR (with internal pull-up)

– 500

20

µA

IOZ

High-impedance output current (VDD = MAX)

All others

–20

20

µA

TRST (with internal pull-down)

–10

800

II

Input current ( VI =VSS to VDD)

TMS, TCK, TDI (with internal pull-ups)

– 500

10

µA

II

Input current (VI = VSS to VDD)

X2 /CLKIN

–50

50

µA

All other inputs

–10

10

IDD(core)

Supply current, core CPU

VDD = 5.25 V

94

mA

IDD(pins)

Supply current, pins

VDD = 5.25 V

63

mA

IDD(standby)Supply current, standby

IDLE2,

Clocks shut off

5

µA

Ci

Input capacitance

15

pF

Co

Output capacitance

15

pF

† For conditions shown as MIN / MAX, use the appropriate value specified under “recommended operating conditions”.

‡ Typical values are at VDD = 5 V, TA = 25°C, unless otherwise specified.

NOTE 2: Figure 3 shows the test load circuit and Figures 4 and 5 show the voltage reference levels.