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SMB135 Datasheet(PDF) 10 Page - Summit Microelectronics, Inc. |
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SMB135 Datasheet(HTML) 10 Page - Summit Microelectronics, Inc. |
10 / 34 page SMB135 Summit Microelectronics, Inc 2106 3.1 11/4/2008 10 I2C-2 WIRE SERIAL INTERFACE AC OPERATING CHARACTERISTICS – 400 kHz TA= 0°C to +85°C, VIN = +5.0V, VFLOAT = +4.2V unless otherwise noted. All voltages are relative to GND. 400kHz Symbol Description Conditions Min Typ Max Units fSCL SCL clock frequency 0 400 kHz TLOW Clock low period 1.3 µs THIGH Clock high period 0.6 µs tBUF Bus free time between a STOP and a START condition Before new transmission – Note 6 1.3 µs tSU:STA Start condition setup time 0.6 µs tHD:STA Start condition hold time 0.6 µs tSU:STO Stop condition setup time 0.6 µs tAA Clock edge to data valid SCL low to valid SDA (cycle n) 0.2 0.9 µs tDH Data output hold time SCL low (cycle n+1) to SDA change 0.2 µs tR SCL and SDA rise time Note 6 20 + 0.1Cb 300 ns tF SCL and SDA fall time Note 6 20 + 0.1Cb 300 ns tSU:DAT Data in setup time 100 ns tHD:DAT Data in hold time 0 0.9 µs TI Noise filter SCL and SDA Noise suppression 140 ns tWR_CONFIG Write cycle time config Configuration registers 10 ms tWR_EE Write cycle time EE Memory array 5 ms Note 6: Guaranteed by Design. Figure 4 – I 2C Timing Diagrams t R t F t HIGH t LOW t SU:STA t HD:STA t SU:DAT t HD:DAT t SU:STO t BUF t DH t AA SCL SDA (IN) SDA (OUT) t WR (For Write Operation Only) I2C TIMING DIAGRAMS |
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