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CXA1702AR Datasheet(PDF) 4 Page - Sony Corporation |
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CXA1702AR Datasheet(HTML) 4 Page - Sony Corporation |
4 / 24 page —4— CXA1702AR 9T2 — — 10 REFV Hi8:4.45V Nor:3.6V input 11 RFAGC 1.9V 400mVp-p OUT output 12 RFAGCTC 2.5V to — 4.75V input (during EVR ad- justment) 13 RFAGC — 220mVp-p IN input 14 DOCDET 2.55V — (when pin is open) Test pin. Connect decoupling capacitance between this pin and GND. EVR adjusting pin to decide the adjustment range of middle tune fo. Input the following: Hi8 : 4.45 V Nor: 3.6 V Output pin for playback Y signal. RFAGC time constant pin. RFAGC gain may be adjusted by EVR. Increasing the input voltage increases gain. Input pin for playback Y signal. Playback Y signal is separated from playback video signal output to Pin 17 (MTOUT), then input to Pin 13 (RFAGCIN). Set input signal bias in the range from 1 V to 3.5 V. Connect to Vcc when this pin is not in use. Pin for deciding dropout detection level. Connect decoupling capacitance between this pin and GND. For adjustment, input voltage proportional to Pin 52 (VREG) output voltage. Increasing the input voltage increases the detection level. Pin Symbol Pin voltage Equivalent circuit Description No. DC AC 140 60k 270 40µ 3.25V 40µ 10 15k 11 40µ 2k 600µ 410µ 12 140 50µ 50µ 25µ 25µ 140 13p 50k 3.25V 13 50µ 14 26.5k 42.5k 4.15V 140 50µ 12 RFAGCTC 4700p 470k VCC |
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