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SN74BCT899 Datasheet(PDF) 1 Page - Texas Instruments |
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SN74BCT899 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 8 page 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 ODD/EVEN ERRA LEAB A1 A2 A3 A4 A5 A6 A7 A8 APAR OEBA GND VCC OEAB B1 B2 B3 B4 B5 B6 B7 B8 BPAR LEBA SEL ERRB DW PACKAGE (TOP VIEW) SN74BCT899 9BIT LATCHABLE TRANSCEIVER WITH PARITY GENERATOR/CHECKER SCBS253 − JUNE 1992 − REVISED NOVEMBER 1993 Copyright 1993, Texas Instruments Incorporated 2−1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) • Option to Select Generate Parity and Check or Feed-Through Data/Parity in A-to-B or B-to-A Directions • Simultaneously Generates and Checks Parity • Packaged in Plastic Small-Outline Package description The SN74BCT899 is a 9-bit to 9-bit parity transceiver with transparent latches. The device can operate as a feed-through transceiver or it can generate/check parity from the 8-bit data buses in either direction. It has a current-sinking capability of 24 mA at the A bus and 64 mA at the B bus. The SN74BCT899 features independent latch- enable (LEAB or LEBA) inputs, a select (SEL) input for ODD/EVEN parity, and separate error-signal (ERRA or ERRB) outputs for checking parity. The SN74BCT899 is characterized for operation from 0 °C to 70°C. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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