Electronic Components Datasheet Search |
|
TLC320AD58 Datasheet(PDF) 7 Page - Texas Instruments |
|
TLC320AD58 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 27 page 1–3 1.5 Terminal Functions (Continued) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION INLM 2 I Inverting input to left analog input amplifier INLP 1 I Noninverting input to left analog input amplifier INRM 27 I Inverting input to right analog input amplifier INRP 28 I Noninverting input to right analog input amplifier LGND 25 I Logic power supply ground for analog modulator LRClk 14 I/O Left/right clock. LRClk signifies whether the serial data is associated with the left channel ADC (when LRClk is high) or the right channel ADC (when LRClk is low). LRClk is low when DigPD is low. MCLK 20 I Master clock. MCLK is used to derive all the key logic signals of the sigma-delta audio ADC. The nominal input frequency range is 18.432 MHz to 256 kHz. MODE(0–2) 13, 22, 8 I Serial modes. MODE(0–2) configure this device for many different modes of operation. The different configurations are: Master versus slave 16 bit versus 18 bit MSB first versus LSB first Slave: Fsync controlled versus Fsync high Each of these modes is described in the serial interface section along with timing diagrams. MODE MASTER/ MSB/LSB 0 1 2 SLAVE BITS FIRST 0 0 0 slave up to 18 MSB 0 0 1 slave 18 LSB 0 1 0 slave up to 18 MSB 0 1 1 master 16 MSB 1 0 0 master 18 MSB 1 0 1 master 18 LSB 1 1 0 master 16 MSB 1 1 1 master 16 LSB OSFL, OSFR 9, 21 O Over scale flag left/right. If the left/right channel digital output exceeds full scale output range for two consecutive conversions, this flag is set high for 4096 LRClk periods. OSFL and OSFR are low when DigPD is low. SCLK 15 I/O Shift clock. If SCLK is configured as an input, SCLK is used to clock serial data out of the sigma-delta audio ADC. If SCLK is configured as an output, SCLK stops clocking when DigPD is low. TEST1 7 I Test mode 1. TEST1 should be low for normal operation. TEST2 11 I Test mode 2. TEST2 should be low for normal operation. REFI 3 I Input voltage for modulator reference (normally connected to REFO, terminal 26). REFO 26 I Internal voltage reference Vlogic 24 I Logic power supply voltage (5 V) for analog modulator |
Similar Part No. - TLC320AD58 |
|
Similar Description - TLC320AD58 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |