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TM124MBK36C-70 Datasheet(PDF) 10 Page - Texas Instruments |
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TM124MBK36C-70 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 11 page TM124MBK36C, TM124MBK36S 1048576 BY 36-BIT TM248NBK36C, TM248NBK36S 2097152 BY 36-BIT DYNAMIC RAM MODULE SMMS138B – MARCH 1992 – REVISED JUNE 1995 10 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 timing requirements over recommended ranges of supply voltage and operating free-air temperature (continued) ’124MBK36C-60 ’248NBK36C-60 ’124MBK36C-70 ’248NBK36C-70 ’124MBK36C-80 ’248NBK36C-80 UNIT MIN MAX MIN MAX MIN MAX tWCH Hold time, write after CAS low 15 15 15 ns tWCR Hold time, write after RAS low (see Note 9) 50 55 60 ns tWHR Hold time, W high (CBR refresh only) 10 10 10 ns tCHR Delay time, RAS low to CAS high (CBR refresh only) 15 15 20 ns tCRP Delay time, CAS high to RAS low 0 0 0 ns tCSH Delay time, RAS low to CAS high 60 70 80 ns tCSR Delay time, CAS low to RAS low (CBR refresh only) 10 10 10 ns tRAD Delay time, RAS low to column address (see Note 11) 15 30 15 35 15 40 ns tRAL Delay time, column address to RAS high 30 35 40 ns tCAL Delay time, column address to CAS high 30 35 40 ns tRCD Delay time, RAS low to CAS low (see Note 11) 20 45 20 52 20 60 ns tRPC Delay time, RAS high to CAS low (CBR refresh only) 0 0 0 ns tRSH Delay time, CAS low to RAS high 15 18 20 ns tREF Refresh time interval 16 16 16 ms tT Transition time 2 50 2 50 2 50 ns NOTES: 9. The minimum value is measured when tRCD is set to tRCD min as a reference. 10. Either tRRH or tRCH must be satisfied for a read cycle. 11. The maximum value is specified only to assure access time. device symbolization (TM124MBK36C illustrated) TM124MBK36C –SS YYMMT YY = Year Code MM = Month Code T = Assembly Site Code –SS = Speed Code NOTE: Location of symbolization may vary. |
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