TM497FBK32H, TM497FBK32I 4194304 BY 32BIT

TM893GBK32H, TM893GBK32I 8388608 BY 32BIT

EXTENDEDDATAOUT DYNAMIC RAM MODULES

SMMS674A − MARCH 1997 − REVISED SEPTEMBER 1997

2

POST OFFICE BOX 1443

Table 1. TM497FBK32H/I Connection Table

DATA BLOCK

RASx

CASx

DQ0 − DQ7

RAS0

CAS0

DQ8 − DQ15

RAS0

CAS1

DQ16 − DQ23

RAS2

CAS2

DQ24 − DQ31

RAS2

CAS3

Table 2. TM893GBK32H/I Connection Table

DATA BLOCK

RASx

CASx

DATA BLOCK

Side 1

Side 2

CASx

DQ0 − DQ7

RAS0

RAS1

CAS0

DQ8 − DQ15

RAS0

RAS1

CAS1

DQ16 − DQ23

RAS2

RAS3

CAS2

DQ24 − DQ31

RAS2

RAS3

CAS3

refresh

The refresh period is extended to 32 ms and, during this period, each of the 2 048 rows must be strobed with

RAS to retain data. CAS can remain high during the refresh sequence to conserve power.

power up

To achieve proper operation, an initial pause of 200

µs followed by a minimum of eight initialization cycles is

(RAS-only or CBR ) cycle.

single-in-line memory module and components

PC substrate: 1,27

± 0,1 mm (0.05 inch) nominal thickness; 0.005 inch/inch maximum warpage

Bypass capacitors: Multilayer ceramic

Contact area for TM497FBK32H and TM893GBK32H: Nickel plate and gold plate over copper

Contact area for TM497FBK32I and TM893GBK32I: Nickel plate and tin-lead over copper