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FXMAR2102L8X Datasheet(PDF) 3 Page - Fairchild Semiconductor |
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FXMAR2102L8X Datasheet(HTML) 3 Page - Fairchild Semiconductor |
3 / 16 page © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FXMAR2102 • Rev. 1.0.0 3 Pin Configuration Figure 2. MicroPak™ (Top-Through View) Figure 3. UMLP (Top-Through View) Pin Definitions Pin # Name Description 1 VCCA A-Side Power Supply 2, 3 A0, A1 A-Side Inputs or 3-State Outputs 4 GND Ground 5 OE Output Enable Input 6, 7 B1, B0 B-Side Inputs or 3-State Outputs 8 VCCB B-Side Power Supply Truth Table Control Outputs OE (1) LOW Logic Level 3-State HIGH Logic Level Normal Operation Note: 1. If the OE pin is driven LOW, the FXMAR2102 is disabled and the A0, A1, B0, and B1 pins (including dynamic drivers) are forced into 3-state and all four 10K internal pull-up resisters are decoupled from their respective VCC. A0 A1 GND 76 5 12 3 84 OE VCCA VCCB B0 B1 |
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