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IS61LV2568L-8T Datasheet(PDF) 4 Page - Integrated Silicon Solution, Inc |
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IS61LV2568L-8T Datasheet(HTML) 4 Page - Integrated Silicon Solution, Inc |
4 / 14 page IS61LV2568L 4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 04/28/08 CAPACITANCE(1,2) Symbol Parameter Conditions Max. Unit CIN Input Capacitance VIN = 0V 6 pF CI/O Input/Output Capacitance VOUT = 0V 8 pF Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25°C, f = 1 MHz, VDD = 3.3V. POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) -8 ns -10 ns Symbol Parameter Test Conditions Min. Max. Min. Max. Unit ICC VDD Operating VDD = Max., CE = VIL Com. — 65 — 60 mA Supply Current IOUT = 0 mA, f = Max. Ind. — 65 typ.(2) —50 — 50 ISB1 TTL Standby VDD = Max., Com. — 30 — 25 mA Current VIN = VIH or VIL Ind. — 30 (TTL Inputs) CE ≥ VIH, f = max ISB2 CMOS Standby VDD = Max., Com. — 3 — 3 mA Current CE ≥ VDD – 0.2V, Ind. — 4 mA (CMOS Inputs) VIN ≥ VDD – 0.2V, or typ.(2) — 700 — 700 μA VIN ≤ 0.2V, f = 0 Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. 2. Typical values are measured at VDD=3.3V, TA=250C. Not 100% tested. |
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