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IS31AP4066D Datasheet(PDF) 9 Page - Integrated Silicon Solution, Inc |
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IS31AP4066D Datasheet(HTML) 9 Page - Integrated Silicon Solution, Inc |
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9 / 14 page  IS31AP4066D Integrated Silicon Solution, Inc. – www.issi.com Rev.A, 11/29/2011 9 APPLICATION INFORMATION EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS The IS31AP4066D’s QFN (die attach paddle) package provides a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane and, finally, surrounding air. The QFN package must have it’s DAP soldered to a copper pad on the PCB. The DAP’s PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. BRIDGE CONFIGURATION EXPLANATION As shown in Figure 2, the IS31AP4066D consists of two pairs of operational amplifiers, forming a two-channel (channel A and channel B) stereo amplifier. External feedback resistors R2, R4 and input resistors R1 and R3 set the closed-loop gain of Amp A (-out) and Amp B (-out) whereas two internal 20kΩ resistors set Amp A’s (+out) and Amp B’s (+out) gain at 1. The IS31AP4066D drives a load, such speaker, connected between the two amplifier outputs, −OUTA and +OUTA. Figure 2 shows that Amp A’s (-out) output serves as Amp A’s (+out) input. This results in both amplifiers producing signals identical in magnitude, but 180° out of phase. Taking advantage of this phase difference, a load is placed between −OUTA and +OUTA and driven differentially (commonly referred to as “bridge mode”). This results in a differential gain of AVD = 2×(Rf/Ri) (1) or AVD = 2×(R2/R1) Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier’s output and ground. For a given supply voltage, bridge mode has a distinct advantage over the single-ended configuration: its differential output doubles the voltage swing across the load. This produces four times the output power when compared to a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by biasing channel A’s and channel B’s outputs at half-supply. This eliminates the coupling capacitor that single supply, single ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration forces a single-supply amplifier’s half-supply bias voltage across the load. This increases internal IC power dissipation and may permanently damage loads such as speakers. POWER DISSIPATION Power dissipation is a major concern when designing a successful single-ended or bridged amplifier. Equation (2) states the maximum power dissipation point for a single ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = (VDD) 2/(2π2R L) Single-Ended (2) However, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher internal power dissipation for the same conditions. The IS31AP4066D has two operational amplifiers per channel. The maximum internal power dissipation per channel operating in the bridge mode is four times that of a single-ended amplifier. From Equation (3), assuming a 5V power supply and an 8Ω load, the maximum single channel power dissipation is 0.63W or 1.26W for stereo operation. PDMAX = 4×(VDD) 2/(2π2RL) Bridge Mode(3) The IS31AP4066D’s power dissipation is twice that given by Equation (2) or Equation (3) when operating in the single-ended mode or bridge mode, respectively. Twice the maximum power dissipation point given by Equation (3) must not exceed the power dissipation given by Equation (4): PDMAX' = (TJMAX − TA)/θJA (4) The IS31AP4066D’s TJMAX = 150°C. In the QFN package soldered to a DAP pad that expands to a copper area of 5in 2 on a PCB, the IS31AP4066D’s θJA is 23°C/W. At any given ambient temperature TA, use Equation (4) to find the maximum internal power dissipation supported by the IC packaging. Rearranging Equation (4) and substituting PDMAX for PDMAX' results in Equation (5). This equation gives the maximum ambient temperature that still allows maximum stereo power dissipation without violating the IS31AP4066D’s maximum junction temperature. TA = TJMAX – 2×PDMAX θJA (5) For a typical application with a 5V power supply and an 8Ω load, the maximum ambient temperature that allows maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 85°C for the QFN package. TJMAX = PDMAX θJA + TA (6) Equation (6) gives the maximum junction temperature TJMAX. If the result violates the IS31AP4066D’s 150°C, reduce the maximum junction temperature by reducing the power supply voltage or increasing the load resistance. Further allowance should be made for |
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