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TC75S63TU Datasheet(PDF) 2 Page - Toshiba Semiconductor |
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TC75S63TU Datasheet(HTML) 2 Page - Toshiba Semiconductor |
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2 / 9 page  TC75S63TU 2012-03-14 2 Marking (top view) Pin Connection (top view) Electrical Characteristics DC Characteristics (VDD = 3.3 V, VSS = GND, Ta = 25°C) Characteristics Symbol Test Circuit Test Condition Min Typ. Max Unit Input offset voltage VIO 1 RS = 1 kΩ, RF = 100 kΩ − 1 7 mV Input offset current IIO − − − 1 − pA Input bias current II − − − 1 − pA Common mode input voltage CMVIN 2 RS = 1 kΩ, RF = 100 kΩ 0 − 2.4 V Voltage gain (open loop) GV − − − 100 − dB VOH 3 RL ≥ 100 kΩ 3.2 − − Maximum output voltage VOL 4 RL ≥ 100 kΩ − − 0.1 V Common mode input signal rejection ratio CMRR 2 VIN = 0 to 2.4 V 60 80 − dB Supply voltage rejection ratio SVRR 1 VDD = 2.2 to 5.5 V 60 80 − dB Supply current IDD 5 − − 500 650 μA Source current Isource 6 − 1500 − − μA Sink current Isink 7 − 1500 − − μA AC Characteristics (VDD = 3.3 V, VSS = GND, Ta = 25°C) Characteristics Symbol Test Circuit Test Condition Min Typ. Max Unit Equivalent input Noise Voltage VNI − f=1kHz, GV=40dB,RS=100 Ω,Rf=10kΩ − 7.8 − nV/√Hz Unity Gain Cross Frequency fT − GV = 40 dB − 3.5 − MHz Phase delay φD 8 f=2kHz − -2.5 − degrees AC Characteristics (VDD = 1.65 V, VSS = -1.65V, Ta = 25°C) Characteristics Symbol Test Circuit Test Condition Min Typ. Max Unit Slew Rate SR 9 GV = 12 dB,VIN=0.4V − 1.0 − V/ μs VDD 5 IN ( −) 4 1 3 VSS 2 OUT IN ( +) S P 4 5 3 1 2 |
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