Pad Description

Pad Name

I/O

Options

Description

PA0/BZ

PA1/BZ

PA2

PA3/PFD

PA4~PA7

I/O

Wake-up

Pull-high

or None

CMOS or

NMOS

PA0~PA7 constitute an 8-bit bidirectional input/output port with Schmitt trig-

ger input capability. Each pin on port can be configured as a wake-up input

by options. PA0~PA3 can be configured as a CMOS output or NMOS in-

put/output with or without pull-high resistor by options. PA4~PA7 are always

pull-high NMOS input/output. Of the eight bits, PA0~PA1 can be set as I/O

pins or buzzer outputs by options. PA3 can be set as an I/O pin or as a PFD

output also by options.

PB0/INT0

PB1/INT1

PB2/TMR

PB3~PB5

I

¾

PB0~PB5 constitute a 6-bit Schmitt trigger input port. Each pin on port are

with pull-high resistor. Of the six bits, PB0 and PB1 can be set as input pins or

as external interrupt control pins (INT0) and (INT1) respectively, by software

application. PB2 can be set as an input pin or as a timer/event counter input

pin TMR also by software application.

VLCD

I

¾

LCD power supply for HT49R30A-1/HT49C30-1.

Voltage pump for HT49C30L.

V2

I

¾

Voltage pump for HT49R30A-1/HT49C30-1.

LCD power supply for HT49C30L.

V1,C1,C2

I

¾

Voltage pump

COM0~COM2

COM3/SEG18

O

1/2, 1/3or1/4

Duty

SEG18 can be set as a segment or as a common output driver for LCD panel

by options. COM0~COM2 are outputs for LCD panel plate.

SEG0~SEG17

O

¾

LCD driver outputs for LCD panel segments

OSC1

OSC2

I

O

Crystal or RC

OSC1 and OSC2 are connected to an RC network or a crystal (by options)

for the internal system clock. In the case of RC operation, OSC2 is the output

terminal for 1/4 system clock.

The system clock may come from the RTC oscillator. If the system clock co-

mes from RTC OSC, these two pins can be floating.

OSC3

OSC4

I

O

RTC or

System Clock

Real time clock oscillators. OSC3 and OSC4 are connected to a 32768Hz

crystal oscillator for timing purposes or to a system clock source (depending

on the options).

VSS

¾¾

Negative power supply, ground

VDD

¾¾

Positive power supply

RES

I

¾

Schmitt trigger reset input, active low

Absolute Maximum Ratings

Storage Temperature ............................

-50°Cto125°C

Operating Temperature ...........................

-100mA

Total Power Dissipation .....................................500mW

Note: These are stress ratings only. Stresses exceeding the range specified under

²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed

in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.

²*² For HT49R30A-1/HT49C30-1

²**² For HT49C30L

HT49R30A-1/HT49C30-1/HT49C30L

Rev. 2.10

4

July 30, 2012