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HT49R70A-1 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT49R70A-1 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 44 page  HT49R70A-1/HT49C70-1/HT49C70L Rev. 2.40 10 July 30, 2012 When a control transfer takes place, an additional dummy cycle is required. Program Memory - ROM The program memory is used to store the program in- structions which are to be executed. It also contains data, table, and interrupt entries, and is organized into 8192 ´16 bits which are addressed by the program counter and table pointer. Certain locations in the ROM are reserved for special usage: · Location 000H Location 000H is reserved for program initialization. After chip reset, the program always begins execution at this location. · Location 004H Location 004H is reserved for the external interrupt service program. If the INT0 input pin is activated, and the interrupt is enabled, and the stack is not full, the program begins execution at location 004H. · Location 008H Location 008H is reserved for the external interrupt service program also. If the INT1 input pin is activated, and the interrupt is enabled, and the stack is not full, the program begins execution at location 008H. · Location 00CH Location 00CH is reserved for the Timer/Event Coun- ter 0 interrupt service program. If a timer interrupt re- sults from a Timer/Event Counter 0 overflow, and if the interrupt is enabled and the stack is not full, the pro- gram begins execution at location 00CH. · Location 010H Location 010H is reserved for the Timer/Event Coun- ter 1 interrupt service program. If a timer interrupt re- sults from a Timer/Event Counter 1 overflow, and if the interrupt is enabled and the stack is not full, the pro- gram begins execution at location 010H. · Location 014H Location 014H is reserved for the Time Base interrupt service program. If a Time Base interrupt occurs, and the interrupt is enabled, and the stack is not full, the program begins execution at location 014H. · Location 018H Location 018H is reserved for the real time clock inter- rupt service program. If a real time clock interrupt oc- curs, and the interrupt is enabled, and the stack is not full, the program begins execution at location 018H. · Table location Any location in the ROM can be used as a look-up ta- ble. The instructions ²TABRDC [m]² (the current page, 1 page=256 words) and ²TABRDL [m]² (the last page) transfer the contents of the lower-order byte to the specified data memory, and the contents of the higher-order byte to TBLH (Table Higher-order byte register) (08H). Only the destination of the lower-order byte in the table is well-defined; the other bits of the ta- ble word are all transferred to the lower portion of TBLH. The TBLH is read only, and the table pointer (TBLP) is a read/write register (07H), indicating the ta- ble location. Before accessing the table, the location should be placed in TBLP. All the table related instruc- tions require 2 cycles to complete the operation. These areas may function as a normal ROM depend- ing upon the user ¢s requirements. Stack Register - STACK The stack register is a special part of the memory used to save the contents of the program counter. The stack is organized into 16 levels and is neither part of the data nor part of the program, and is neither readable nor writeable. Its activated level is indexed by a stack pointer (SP) and is neither readable nor writeable. At the start of a subroutine call or an interrupt acknowledg- ment, the contents of the program counter is pushed D e v i c e i n i t i a l i z a t i o n p r o g r a m E x t e r n a l i n t e r r u p t 0 s u b r o u t i n e T i m e r / e v e n t c o u n t e r 0 i n t e r r u p t s u b r o u t i n e P r o g r a m R O M L o o k - u p t a b l e ( 2 5 6 w o r d s ) N o t e : n r a n g e s f r o m 0 t o 1 F E x t e r n a l i n t e r r u p t 1 s u b r o u t i n e T i m e B a s e I n t e r r u p t R T C I n t e r r u p t 1 6 b i t s L o o k - u p t a b l e ( 2 5 6 w o r d s ) T i m e r / e v e n t c o u n t e r 1 i n t e r r u p t s u b r o u t i n e 0 0 0 H 0 0 4 H 0 0 8 H 0 1 4 H 1 F F F H 0 1 8 H 0 0 C H n 0 0 H n F F H 0 1 0 H 1 F 0 0 H Program Memory Instruction(s) Table Location *12 *11 *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P12 P11 P10 P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1 1 1 1 @7 @6 @5 @4 @3 @2 @1 @0 Table Location Note: *12~*0: Table location bits P12~P8: Current program counter bits @7~@0: Table pointer bits |
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