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HUFA76645S3ST Datasheet(PDF) 7 Page - Fairchild Semiconductor |
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HUFA76645S3ST Datasheet(HTML) 7 Page - Fairchild Semiconductor |
7 / 10 page PSPICE Electrical Model .SUBCKT HUFA76645 2 1 3 ; rev 7 June 1999 CA 12 8 7.4e-9 CB 15 14 7.4e-9 CIN 6 8 4.13e-9 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 121 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 5.1e-9 LSOURCE 3 7 4.4e-9 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 8.3e-3 RGATE 9 20 0.96 RLDRAIN 2 5 10 RLGATE 1 9 51 RLSOURCE 3 7 44 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 2.5e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*200),3.2))} .MODEL DBODYMOD D (IS = 3.6e-12 RS = 2.24e-3 TRS1 = 2e-3 TRS2 = 1.03e-6 CJO = 4.5e-9 TT = 5.1e-8 M = 0.60) .MODEL DBREAKMOD D (RS = 2.5e- 1TRS1 = 1e- 4TRS2 = 1e-7) .MODEL DPLCAPMOD D (CJO = 5.4e- 9IS = 1e-3 0Vj = 1.0 M = 0.9) .MODEL MMEDMOD NMOS (VTO = 1.77 KP = 7 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.96) .MODEL MSTROMOD NMOS (VTO = 2.11 KP = 200 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 1.5 KP = 0.12 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 9.6 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 1.05e- 3TC2 = -5e-7) .MODEL RDRAINMOD RES (TC1 = 8.8e-3 TC2 = 1.7e-5) .MODEL RSLCMOD RES (TC1 = 4e-3 TC2 = 1.5e-5) .MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 2e-6) .MODEL RVTHRESMOD RES (TC1 = -1.9e-3 TC2 = -8e-6) .MODEL RVTEMPMOD RES (TC1 = -1.7e- 3TC2 = 1e-7) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.5 VOFF= -2.0) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.0 VOFF= -4.5) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.0 VOFF= 0.5) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= -1.0) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. 18 22 + - 6 8 + - 5 51 19 8 + - 17 18 6 8 + - 5 8 + - RBREAK RVTEMP VBAT RVTHRES IT 17 18 19 22 12 13 15 S1A S1B S2A S2B CA CB EGS EDS 14 8 13 8 14 13 MWEAK EBREAK DBODY RSOURCE SOURCE 11 7 3 LSOURCE RLSOURCE CIN RDRAIN EVTHRES 16 21 8 MMED MSTRO DRAIN 2 LDRAIN RLDRAIN DBREAK DPLCAP ESLC RSLC1 10 5 51 50 RSLC2 1 GATE RGATE EVTEMP 9 ESG LGATE RLGATE 20 + - + - + - 6 ©2010 Fairchild Semiconductor Corporation HUFA76645S3ST_F085 Rev. A HUFA76645S3ST_F085 |
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