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PPXS2005VLT80R Datasheet(PDF) 8 Page - Freescale Semiconductor, Inc |
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PPXS2005VLT80R Datasheet(HTML) 8 Page - Freescale Semiconductor, Inc |
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8 / 130 page  Overview PXD20 Microcontroller Data Sheet, Rev. 2 Preliminary—Subject to Change Without Notice Freescale Semiconductor 8 Additional notes on low power operation: • Fast wake-up using the on-chip 16 MHz internal RC oscillator allows rapid execution from RAM on exit from low power modes • The 16 MHz internal RC oscillator supports low speed code execution and clocking of peripherals when it is selected as the system clock and can also be used as the PLL input clock source to provide fast start-up without the external oscillator delay • The device includes an internal voltage regulator that includes the following features: Table 2. Operating mode summary1 1 Table Key: On—Powered and clocked OP—Optionally configurable to be enabled or disabled (clock gated) CG—Clock Gated, Powered but clock stopped Off-—Powered off and clock gated FP—VREG Full Performance mode LP—VREG Low Power mode, reduced output capability of VREG but lower power consumption Var—Variable duration, based on the required reconfiguration and execution clock speed BAM—Boot Assist Module Software and Hardware used for device start-up and configuration SoC features Clock sources Wake-up time2 2 A high level summary of some key durations that need to be considered when recovering from low power modes. This does not account for all durations at wake up. Other delays will be necessary to consider including, but not limited to the external supply start-up time. IRC Wake-up time must not be added to the overall wake-up time as it starts in parallel with the VREG. All other wake-up times must be added to determine the total start-up time. RUN On OP OP OP 3 3 Either 64 KB or 8 KB available. On OP OP On OP On OP — — FP — — — — — — — HALT CG OP OP OP 3 On OP OP On OP On OP OP OP FP — — — — — — TBD STOP CG CG CG OP 3 On CG CG OP OP On OP OP OP LP 350 µs 4 µs 20 µs 1 ms 200 µs — 24 µs STANDBY Off Off Off 64 KB 4 4 64 KB of the RAM contents is retained, but not accessible in STANDBY mode. Off Off Off OP OP OP OP OP OP LP 350 µs 8 µs 100 µs 1 ms 200 µs Var 28 µs Off Off Off 8 KB 5 5 8 KB of the RAM contents is retained, but not accessible in STANDBY mode. Off Off Off OP OP OP OP OP OP LP 200 µs 8 µs 100 µs 1 ms 200 µs Var 28 µs POR 500 µs 8 µs 100 µs 1 ms 200 µs BAM 6 6 Dependent on boot option after reset. |
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