Features

PXN20 Product Brief, Rev. 1

Freescale Semiconductor

9

— Page buffers can be allocated for code-only, fixed partitions of code and data, all available for

any access

•

Censorship protection scheme to prevent flash content visibility

•

EE emulation supported by small 16 KB flash blocks in main array with multiple read while write

partitions

•

Hardware managed flash writes, erase and verify sequence

•

Supports flash writes using internal 16 MHz RC oscillator

•

Flash partitioning:

•

Error correction status

— Configurable error-correcting codes (ECC) reporting for RAM and flash

2.6.4

On-Chip SRAM

On-chip SRAM on the PXN20 family features the following:

•

Up to 592/128 KB general purpose RAM

Table 2. Flash Partitioning

PXN20

2 MB

Flash_Base + 0x0000_0000

16 KB

Flash_Base + 0x0000_4000

16 KB

Flash_Base + 0x0000_8000

16 KB

Flash_Base + 0x0000_C000

16 KB

Flash_Base + 0x0001_0000

16 KB

Flash_Base + 0x0001_4000

16 KB

Flash_Base + 0x0001_8000

16 KB

Flash_Base + 0x0001_C000

16 KB

Flash_Base + 0x0002_0000

64 KB

Flash_Base + 0x0003_0000

64 KB

Flash_Base + 0x0004_0000

128 KB

Flash_Base + 0x0006_0000

128 KB

Flash_Base + 0x0008_0000

256 KB

Flash_Base + 0x000C_0000

256 KB

Flash_Base + 0x0010_0000

256 KB

Flash_Base + 0x0014_0000

256 KB

Flash_Base + 0x0018_0000

256 KB

Flash_Base + 0x001C_0000

256 KB

Shadow Block

16 KB