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FAN53611 Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FAN53611 Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 14 page © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN53601 / FAN53611 • Rev. 1.0.1 2 Pin Configurations Figure 2. Bumps Facing Down Figure 3. Bumps Facing Up Pin Definitions Pin # Name Description A1 MODE MODE. Logic 1 on this pin forces the IC to stay in PWM Mode. A logic 0 allows the IC to automatically switch to PFM during light loads. The regulator also synchronizes its switching frequency to four times the frequency provided on this pin. Do not leave this pin floating. B1 SW Switching Node. Connect to output inductor. C1 FB Feedback / VOUT. Connect to output voltage. C2 GND Ground. Power and IC ground. All signals are referenced to this pin. B2 EN Enable. The device is in Shutdown Mode when voltage to this pin is < 0.4 V and enabled when > 1.2 V. Do not leave this pin floating. A2 VIN Input Voltage. Connect to input power source. |
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