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PE64101 Datasheet(PDF) 7 Page - Peregrine Semiconductor Corp. |
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PE64101 Datasheet(HTML) 7 Page - Peregrine Semiconductor Corp. |
7 / 13 page Product Specification PE64101 Page 7 of 13 Document No. 70-0378-01 │ www.psemi.com ©2012 Peregrine Semiconductor Corp. All rights reserved. Table 5. 6-Bit Serial Programming Register Map Table 6. Serial Interface AC Characteristics 2.3V < VDD < 3.6V, -40 °C < TA < +85 °C, unless otherwise specified Symbol Parameter Min Max Unit fCLK Serial Clock Frequency 26 MHz tR SCL, SDA, SEN Rise Time 6.5 ns tF SCL, SDA, SEN Fall Time 6.5 ns tESU SEN rising edge to SCL rising edge 19.2 ns tEHD SCL rising edge to SEN falling edge 19.2 ns tDSU SDA valid to SCL rising edge 13.2 ns tDHD SDA valid after SCL rising edge 13.2 ns tEOW SEN falling edge to SEN rising edge 38.4 ns b4 b3 b2 b1 b0 d4 d3 d2 d1 d0 b5 STB1 b7 b6 0 0 MSB (first in) LSB (last in) Note: 1. The DTC is active when low (set to 0) and in low-current stand-by mode when high (set to 1) Figure 15. Recommended Bus sharing SCL SDA VDD GND DGND RF- RF+ SCL SDA VDD SEN GND DGND RF- RF+ SCL SDA VDD DTC 1 SEN SEN2 SEN1 DTC 2 |
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