W78L51

Publication Release Date: January 1999

- 11 -

Revision A2

AC CHARACTERISTICS

The AC specifications are a function of the particular process used to manufacture the part, the

ratings of the I/O buffers, the capacitive load, and the internal routing capacitance. Most of the

usually experience less than a

±20 nS variation. The numbers below represent the performance

expected from a 0.5 micron CMOS process when using 2 and 4 mA output buffers.

Clock Input Waveform

T

T

XTAL1

F

CH

CL

OP,

PARAMETER

SYMBOL

MIN.

TYP.

MAX.

UNIT

NOTES

Operating Speed

0

-

24

MHz

1

Clock Period

25

-

-

nS

2

Clock High

10

-

-

nS

3

Clock Low

10

-

-

nS

3

Notes:

1. The clock may be stopped indefinitely in either state.

3. There are no duty cycle requirements on the XTAL1 input.

Program Fetch Cycle

PARAMETER

SYMBOL

MIN.

TYP.

MAX.

UNIT

NOTES

Address Valid to ALE Low

∆

-

-

nS

4

Address Hold from ALE Low

∆

-

-

nS

1, 4

ALE Low to

PSEN Low

∆

-

-

nS

4

PSEN Low to Data Valid

-

-

nS

2

Data Hold after PSEN High

0

-

nS

3

Data Float after PSEN High

0

-

nS

ALE Pulse Width

∆

-

nS

4

PSEN Pulse Width

∆

-

nS

4

Notes:

1. P0.0

−P0.7, P2.0−P2.7 remain stable throughout entire memory cycle.

3. Data have been latched internally prior to PSEN going high.

4. "

∆" (due to buffer driving delay and wire loading) is 20 nS.