W78E58

Publication Release Date: November 1997

- 9 -

Revision A2

EX3: External interrupt 3 enable if set

IE3: If IT3 = 1, IE3 is set/cleared automatically by hardware when interrupt is detected/serviced

IT3: External interrupt 3 is falling-edge/low-level triggered when this bit is set/cleared by software

PX2: External interrupt 2 priority high if set

EX2: External interrupt 2 enable if set

IE2: If IT2 = 1, IE2 is set/cleared automatically by hardware when interrupt is detected/serviced

IT2: External interrupt 2 is falling-edge/low-level triggered when this bit is set/cleared by software

Eight-source interrupt informations:

INTERRUPT

SOURCE

VECTOR

ADDRESS

POLLING

SEQUENCE WITHIN

PRIORITY LEVEL

ENABLE

REQUIRED

SETTINGS

INTERRUPT

TYPE

EDGE/LEVEL

External Interrupt 0

03H

0 (highest)

IE.0

TCON.0

Timer/Counter 0

0BH

1

IE.1

-

External Interrupt 1

13H

2

IE.2

TCON.2

Timer/Counter 1

1BH

3

IE.3

-

Serial Port

23H

4

IE.4

-

Timer/Counter 2

2BH

5

IE.5

-

External Interrupt 2

33H

6

XICON.2

XICON.0

External Interrupt 3

3BH

7 (lowest)

XICON.6

XICON.3

2. PORT4

Another bit-addressable port P4 is also available and only 4 bits (P4<3:0>) can be used. This port

address is located at 0D8H with the same function as that of port P1, except the P4.3 and P4.2 are

INT3 ).

Example:

P4

REG

0D8H

MOV

P4, #0AH

; Output data "A" through P4.0

−P4.3.

MOV

A, P4

; Read P4 status to Accumulator.

SETB

P4.0

; Set bit P4.0

CLR

P4.1

; Clear bit P4.1

3. Reduce EMI Emission

Because of the large on-chip flash EEPROM, when a program is running in internal ROM space, the

ALE will be unused. The transition of ALE will cause noise, so it can be turned off to reduce the EMI