W83194BR-C datasheet(3/13 Pages) WINBOND

Part #	W83194BR-C

Description	200MHZ CLOCK FOR CAMINO CHIPSET

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Manufacturer	WINBOND [Winbond]

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W83194BR-C

PRELIMINARY

Publication Release Date: Dec. 1999

- 3 -

Revision 0.40

4.0 PIN DESCRIPTION

IN - Input

OUT - Output

I/O - Bi-directional Pin

# - Active Low

* - Internal 250k

Ω pull-up

4.1 Crystal I/O

SYMBOL

I/O

FUNCTION

Xin

4

IN

Crystal input with internal loading capacitors and

feedback resistors.

Xout

5

OUT

Crystal output at 14.318MHz nominally.

4.2 CPU, 3V66, PCI, IOAPIC Clock Outputs

SYMBOL

I/O

FUNCTION

CPUCLK [0:2]

45,44

OUT

Low skew (< 250ps) clock outputs for host

frequencies such as CPU and Chipset.

CPU/2

42

O

As a reference signal for DRCG. The voltage is

determined by VDDQ2.

PD#

31

IN

Power Down mode when driven low.

SEL133/100#

25

IN

Frequency selection input pin.

PCICLK0/ *FS2

7

I/O

3.3V PCI clock during normal operation.

Latched input for FS2 at initial power up for H/W

selecting the output frequency of CPU, SDRAM and

PCI clocks.

PCICLK1/ *FS1

8

I/O

Low skew (< 250ps) PCI clock outputs.

Latched input for FS1 at initial power up for H/W

selecting the output frequency of CPU, SDRAM and

PCI clocks.

PCICLK[2,8:9]

10,11,12,13,15

,18,19

I/O

Low skew (< 250ps) PCI clock outputs.

PCICLK7/ *FS3

16

I/O

Low skew (< 250ps) PCI clock outputs.

Latched input for FS3 at initial power up for H/W

selecting the output frequency of CPU, SDRAM and

PCI clocks.

3V66 [0:2]

21, 22, 23

OUT

3.3V output clocks for the chipset.

IOAPIC[0:2]

46, 45, 1

O

Synchronous with CPU clocks, 2.5V.

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