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W83194R-58A Datasheet(PDF) 4 Page - Winbond |
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W83194R-58A Datasheet(HTML) 4 Page - Winbond |
4 / 13 page W83194R-58A PRELIMINARY Publication Release Date: Nov. 1999 - 4 - Revision 0.30 AGP[ 0:1] 15,47 OUT Accelerate Graphic Port clock outputs SDRAM11/ CPU_STOP# 17 I/O If MODE =1 (default), then this pin is a SDRAM clock buffered output of the crystal. If MODE = 0 , then this pin is CPU_STOP# input used in power management mode for synchronously stopping the all CPU clocks. SDRAM10/ PCI_STOP# 18 I/O If MODE = 1 (default), then this pin is a SDRAM clock output. If MODE = 0 , then this pin is PCI_STOP # and used in power management mode for synchronously stopping the all PCI clocks. SDRAM [ 0:9] 20,21,28,29,31 ,32,34, 35,37,38 O SDRAM clock outputs which have the same frequency as CPU clocks. PCICLK_F/ *FS1 7 I/O Latched input for FS1 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. Free running PCI clock during normal operation. |
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