LC72131K, LC72131KMA

No.A0788-3/22

Allowable Operating Ranges at Ta = -40

C to +85C, VSS = 0V

Parameter

Symbol

Pins

Conditions

Ratings

unit

min

typ

max

Supply voltage

VDD

VDD

4.5

5.5

V

Input high-level voltage

VIH1

CE, CL, DI

0.7VDD

6.5

V

VIH2

IO1, IO2

0.7VDD

13

V

Input low-level voltage

VIL

CE, CL, DI, IO1, IO2

0

0.3VDD

V

Output voltage

VO1

DO

0

6.5

V

VO2

BO1 to BO4, IO1, IO2, AOUT

0

13

V

Input frequency

fIN1

XIN

VIN1

1.0

8.0

MHz

fIN2

FMIN

VIN2

10

160

MHz

fIN3

AMIN

VIN3

2.0

40

MHz

fIN4

AMIN

VIN4

0.5

10

MHz

fIN5

IFIN

VIN5

0.4

12

MHz

Supported crystals

X'tal

XIN, XOUT

Note 1

4.0

8.0

MHz

Input amplitude

High-level clock pulse width tφH

CL [Figure 1][Figure 2] 160 ns

Low-level clock pulse width

VIN1

XIN

fIN1

400

1500

mVrms

VIN2-1

FMIN

f=10 to 130MHz

40

1500

mVrms

VIN2-2

FMIN

f=130 to 160MHz

70

1500

mVrms

VIN3

AMIN

fIN3

40

1500

mVrms

VIN4

AMIN

fIN4

40

1500

mVrms

VIN5

IFIN

fIN5 (IFS=1)

40

1500

mVrms

VIN6

IFIN

fIN5 (IFS=0)

70

1500

mVrms

Data setup time

tSU

DI, CL

Note 2

0.75

s

Data hold time

tHD

DI, CL

Note 2

0.75

s

Clock low-level time

tCL

CL

Note 2

0.75

s

Clock high-level time

tCH

CL

Note 2

0.75

s

CE wait time

tEL

CE, CL

Note 2

0.75

s

CE setup time

tES

CE, CL

Note 2

0.75

s

CE hold time

tEH

CE, CL

Note 2

0.75

s

Data latch change time

tLC

Note 2

0.75

s

Data output time

tDC

DO, CL

Differs depending

on the value of the

pull-up resistor.

Note 2

0.35

s

tDH

DO, CE

Note 1: Recommended crystal oscillator CI values:

CI

120 (For a 4.5MHz crystal)

CI

70 (For a 7.2MHz crystal)

The characteristics of the oscillation circuit depends on the printed circuit board, circuit constants, and other

factors. Therefore we recommend consulting with the anufacturer of the crystal for evaluation and reliability.

Note 2: Refer to "Serial Data Timing".