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LC786961W Datasheet(PDF) 10 Page - Sanyo Semicon Device |
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LC786961W Datasheet(HTML) 10 Page - Sanyo Semicon Device |
10 / 29 page LC786961W No.A2081-10/29 Continued from the previous page. Pin No. Pin name I/O State when "Reset" Function 47 SDDAT11 I/O Input (L) SDRAM data input/output 11 (pull down resistor) 48 SDDAT10 I/O Input (L) SDRAM data input/output 10 (pull down resistor) 49 SDDAT09 I/O Input (L) SDRAM data input/output 9 (pull down resistor) 50 SDDAT08 I/O Input (L) SDRAM data input/output 8 (pull down resistor) 51 SDDQM O Low SDRAM data mask control output SDRAM-DQMH(UDQM) pin should be connected both for 16M and 64Mbit-SDRAM. 52 SDCLK O Low SDRAM clock output 53 SDCKE O Low SDRAM clock enable output 54 SDADRS11 O Low SDRAM address output 11 No use (NC) for 16Mbit-SDRAM SDRAM-ADRS11 pin connection for 64Mbit-SDRAM 55 SDADRS09 O Low SDRAM address output 9 56 DVDD - - Digital system power supply 57 DVSS - - Digital system ground. This pin must be connected to the 0V level. 58 DVDD15 AO High Capacitor connection pin for internal regulator 59 SDADRS08 O Low SDRAM address output 8 60 SDADRS07 O Low SDRAM address output 7 61 SDADRS06 O Low SDRAM address output 6 62 SDADRS05 O Low SDRAM address output 5 63 SDADRS04 O Low SDRAM address output 4 64 SDADRS03 O Low SDRAM address output 3 65 SDADRS02 O Low SDRAM address output 2 66 SDADRS01 O Low SDRAM address output 1 67 SDADRS00 O Low SDRAM address output 0 68 SDADRS10 O Low SDRAM address output 10 69 SDBA O Low SDRAM bank select address output SDRAM-BANK pin connection for 16Mbit-SDRAM SDRAM-BANK1 pin connection for 64Mbit-SDRAM 70 SDADRS12 O Low SDRAM address output 12 SDRAM-DQML (LDQM) pin connection for 16Mbit-SDRAM. SDRAM-BANK0 pin connection for 64Mbit-SDRAM 71 SDCSB O Low SDRAM Chip Select output 72 SDRASB O Low SDRAM Row Address Strobe output 73 SDCASB O Low SDRAM Column Address Strobe output 74 SDWEB O Low SDRAM Write Enable output 75 SDDAT07 I/O Input (L) SDRAM data input/output 7 (pull down resistor) 76 SDDAT06 I/O Input (L) SDRAM data input/output 6 (pull down resistor) 77 SDDAT05 I/O Input (L) SDRAM data input/output 5 (pull down resistor) 78 SDDAT04 I/O Input (L) SDRAM data input/output 4 (pull down resistor) 79 SDDAT03 I/O Input (L) SDRAM data input/output 3 (pull down resistor) 80 SDDAT02 I/O Input (L) SDRAM data input/output 2 (pull down resistor) 81 SDDAT01 I/O Input (L) SDRAM data input/output 1 (pull down resistor) 82 SDDAT00 I/O Input (L) SDRAM data input/output 0 (pull down resistor) 83 MODE0 I Input LSI mode set pin 0 This pin must be connected to the 0V level. 84 MODE1 I Input LSI mode set pin 1 This pin must be connected to the 0V level. 85 DVDD - - Digital system power supply 86 DVSS - - Digital system ground. This pin must be connected to the 0V level. 87 RESB I - IC reset input ("L"-active) This pin must be set low once after power is first applied. 88 SIFCK I Input Host-I/F Data transmit clock input for serial communication 1 89 SIFDI I/O Input Host-I/F Data input for serial communication 1 Continued to the next page. |
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