REV. C

–4–

AD630–Typical Performance Characteristics

Figure 7. Channel-to-Channel Switch-

Settling Characteristic

Figure 9. Large Signal Inverting

Step Response

TWO WAYS TO LOOK AT THE AD630

The functional block diagram of the AD630 (see page 1) also

shows the pin connections of the internal functions. An alternative

architectural diagram is shown in Figure 10. In this diagram, the

individual A and B channel preamps, the switch, and the inte-

grator output amplifier are combined in a single op amp. This

amplifier has two differential input channels, only one of which

is active at a time.

11

15

2

20

19

18

17

8

7

12

14

13

9

10

2.5k

10k

1

16

2.5k

10k

SEL B

SEL A

B/A

A

B

Figure 10. Architectural Block Diagram

HOW THE AD630 WORKS

The basic mode of operation of the AD630 may be more easy to

recognize as two fixed gain stages which may be inserted into the

signal path under the control of a sensitive voltage comparator.

When the circuit is switched between inverting and noninverting

gain, it provides the basic modulation/demodulation function. The

AD630 is unique in that it includes Laser-Wafer-Trimmed thin-

film feedback resistors on the monolithic chip. The configuration

shown in Figure 11 yields a gain of

±2 and can be easily changed to

The comparator selects one of the two input stages to complete

an operational feedback connection around the AD630. The

deselected input is off and has negligible effect on the operation.

A

B

5k

10k

10k

2

20

19

18

13

15

16

14

9

10

Figure 11. AD630 Symmetric Gain (

±2)

nected for inverting feedback as shown in the inverting gain

configuration diagram in Figure 12. The amplifier has sufficient

ground produced by the feedback connection. When the sign of

the comparator input is reversed, input B will be deselected and

A will be selected. The new equivalent circuit will be the nonin-

across the op-amp input terminals, but since the amplifier drives

this difference voltage to zero the closed loop gain is unaffected.

The 5k and the two 10k resistors on the AD630 chip can be

used to make a gain of two as shown here. By paralleling the

can be programmed for a gain of

±1 (as shown in Figure 18a).

These and other configurations using the on chip resistors

present the inverting inputs with a 2.5k source impedance. The

more complete AD630 diagrams show 2.5k resistors available at

the noninverting inputs which can be conveniently used to mini-

mize errors resulting from input bias currents.

Figure 8. Small Signal Noninverting

Step Response

20mV

500ns

20mV

100

90

10

0%

20mV/DIV

20mV/DIV

TOP TRACE: Vo

BOTTOM TRACE: Vi

100

90

10

0%

100mV

500ns

50mV

1mV

50mV/DIV

1mV/DIV

(A)

TOP TRACE: Vi

MIDDLE TRACE: SETTLING

ERROR (A)

BOTTOM TRACE: Vo

100mV/DIV

100

90

10

0%

10V

10V

1mV

TOP TRACE: Vi

MIDDLE TRACE: SETTLING

ERROR (B)

BOTTOM TRACE: Vo

5 s

10V 20kHz

1mV/DIV

(B)

10V/DIV

5k

10k

10k

CH

A

CH

B

12

2

20

19

18

13

9

10

14

16

15

12

CH A

MIDDLE

TRACE

(A)

10k

10k

BOTTOM

TRACE

TEKTRONIX

7A13

10k

1k

30pF

10k

TOP

TRACE

2

20

13

14

15

12

CH A

10k

10k

BOTTOM

TRACE

10k

TOP

TRACE

(B)

MIDDLE

TRACE

10k

HP5082-2811

20

2

13

14

15