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AD7008JP50 Datasheet(PDF) 2 Page - Analog Devices |
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AD7008JP50 Datasheet(HTML) 2 Page - Analog Devices |
2 / 16 page AD7008–SPECIFICATIONS1 AD7008AP20 AD7008JP50 Test Conditions/ Parameter Min Typ Max Min Typ Max Units Comments SIGNAL DAC SPECIFICATIONS Resolution 10 10 Bits Update Rate (fMAX) 20 50 MSPS IOUT Full Scale 20 20 mA Output Compliance 1 1 Volts DC Accuracy Integral Nonlinearity +1 +1 LSB Differential Nonlinearity ±1 ±1 LSB DDS SPECIFICATIONS 2 Update Rate (fMAX) 20 50 MSPS Dynamic Specifications Signal-to-Noise 50 50 dB fCLK = fMAX, fOUT = 2 MHz Total Harmonic Distortion –55 –53 dB fCLK = fMAX, fOUT = 2 MHz Spurious Free Dynamic Range (SFDR) 3 Narrow Band ( ±50 kHz) –70 –70 dBc fCLK = 6.25 MHz, fOUT = 2.11 MHz Wide Band ( ±2 MHz) –55 –55 dBc VOLTAGE REFERENCE Internal Reference @ +25 °C4 1.2 1.27 1.35 1.2 1.27 1.35 Volts Reference TC 300 300 ppm/ °C VREF Overdrive 5 02 0 2 V LOGIC INPUTS VINH, Input High Voltage VDD–0.9 VDD–0.9 Volts VINL, Input Low Voltage 0.9 0.9 Volts IINH, Input Current 10 10 µA CIN, Input Capacitance 10 10 pF POWER SUPPLIES VDD 4.75 5.25 4.75 5.25 Volts IAA 26 26 mA RSET = 390 Ω IDD 22 + 1.5/MHz 22 + 1.5/MHz mA IAA + IDD fCLK = Max 80 110 125 160 mA Sleep = VDD 10 20 mA NOTES 1Operating temperature ranges as follows: A Version: –40 °C to +85°C; J Version: 0°C to +70°C. 2All dynamic specifications are measured using IOUT. 100% Production tested. 3f CLK = 6.25 MHz, Frequency Word = 5671C71C HEX, f OUT = 2.11 MHz. 4V REF may be externally driven between 0 and V DD. 5Do not allow reference current to cause power dissipation beyond the limit of I AA + IDD shown above. Specifications subject to change without notice. REV. B –2– (VAA = VDD = +5 V ± 5%; T A = TMIN to TMAX, RSET = 390 Ω, R LOAD = 1 Ω for IOUT and IOUT, unless otherwise noted) |
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