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MAX3280E Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX3280E Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 10 page 7 Maxim Integrated MAX3280E/MAX3281E/ MAX3283E/MAX3284E ±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers provide the same clock to their respective circuits. Thus, minimal package-to-package skew is critical. The skew must be kept well below the period of the clock signal to ensure that all of the circuits on the network are synchronized. 128 Receivers on the Bus The standard RS-485 input impedance is 12k Ω (one- unit load). The standard RS-485 transmitter can drive 32 unit loads. The MAX3280E/MAX3281E/MAX3283E/ MAX3284E present a 1/4-unit-load input impedance (48k Ω), which allows up to 128 receivers on the bus. Any combination of these RS-485 receivers with a total of 32 unit loads can be connected to the same bus. Thermal Protection The MAX3280E/MAX3281E/MAX3283E/MAX3284E fea- ture thermal protection. Thermal protection sets the out- put stage in high-impedance mode when a short circuit occurs at the output, limiting both the power dissipation and temperature. The thermal temperature threshold is +165°C, with a hysteresis of 20°C. Test Circuits/Timing Diagrams VOH VOL A B 1V RO -1V fIN = 1MHz tr, tf ≤ 3ns OUTPUT INPUT VCC/2 VCC/2 tPHL tPLH Figure 1. Receiver Propagation Delay tPRZH OUT EN OUT EN VCC/2 VCC/2 VCC 0 VOH 0 VCC 0 VOH 0 FOR MAX3281E THE ENABLE SIGNAL IS INVERTED. S1 OPEN S2 CLOSED S3 = 1.5V S1 OPEN S2 CLOSED S3 = 1.5V 0.25V tPRHZ tPRLZ VCC/2 0.25V OUT EN OUT EN VCC 0 VCC VOL VCC 0 VCC VOL S1 CLOSED S2 OPEN S3 = -1.5V S1 CLOSED S2 OPEN S3 = -1.5V tPRZL VCC/2 VCC/2 GENERATOR 1.5V -1.5V VID R CL 1k Ω S1 VCC S2 50 Ω S3 VCC/2 Figure 2. MAX3281E/MAX3283E Receiver Enable/Disable Timing |
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