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AD7304BR Datasheet(PDF) 3 Page - Analog Devices |
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AD7304BR Datasheet(HTML) 3 Page - Analog Devices |
3 / 14 page –3– AD7304/AD7305 REV. A TIMING SPECIFICATIONS (@ VDD = +3 V or +5 V, VSS = 0 V; or VDD = +5 V and VSS = –5 V, VSS ≤ VREF ≤ VDD, –40 C < TA < +85 C/125 C, unless otherwise noted.) Parameter Symbol 3 V 10% 5 V 10% 5 V 10% Units INTERFACE TIMING SPECIFICATIONS 1, 2 AD7304 Only Clock Width High tCH 70 55 55 ns min Clock Width Low tCL 70 55 55 ns min Data Setup tDS 50 40 40 ns min Data Hold tDH 30 20 20 ns min Load Pulsewidth tLDW 70 60 60 ns min Load Setup tLD1 40 30 30 ns min Load Hold tLD2 40 30 30 ns min Clear Pulsewidth tCLWR 60 60 60 ns min Select tCSS 30 20 20 ns min Deselect tCSH 60 40 40 ns min AD7305 Only Data Setup tDS 60 40 40 ns min Data Hold tDH 30 20 20 ns min Address Setup tAS 60 40 40 ns min Address Hold tAH 30 20 20 ns min Write Width tWR 60 50 50 ns min Load Pulsewidth tLDW 60 50 50 ns min Load Setup tLS 60 40 40 ns min Load Hold tLH 30 20 20 ns min NOTES 1These parameters are guaranteed by design and not subject to production testing. 2All input control signals are specified with t R = tF = 2 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V. ABSOLUTE MAXIMUM RATINGS* VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +8 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, –8 V VREFX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSS, VDD Logic Inputs to GND . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V VOUTX to GND . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V IOUT Short Circuit to GND . . . . . . . . . . . . . . . . . . . . . 50 mA Package Power Dissipation . . . . . . . . . . . . . . (TJ MAX–TA)/ θJA Thermal Resistance θJA 16-Lead Plastic DIP Package (N-16) . . . . . . . . . . 103 °C/W 16-Lead SOIC Package (R-16) . . . . . . . . . . . . . . . 73 °C/W TSSOP-16 Package (RU-16) . . . . . . . . . . . . . . . . 180 °C/W 20-Lead Plastic DIP Package (N-20) . . . . . . . . . . 120 °C/W 20-Lead SOIC Package (R-20) . . . . . . . . . . . . . . . 74 °C/W TSSOP-20 Package (RU-20) . . . . . . . . . . . . . . . . 155 °C/W Maximum Junction Temperature (TJ MAX) . . . . . . . . . +150 °C Operating Temperature Range . . . . . . . . . . . –40 °C to +85°C Storage Temperature Range . . . . . . . . . . . . –65 °C to +150°C Lead Temperature N-16 and N-20 (Soldering, 10 secs) . . . . . . . . . . . . +300 °C R-16, R-20, RU-16, RU-20 (Vapor Phase, 60 secs) . . +215 °C R-16, R-20, RU-16, RU-20 (Infrared, 15 secs) . . . . +220 °C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING GUIDE Temperature Package Package Model Range Description Options AD7304BN –40 °C/+85°C 16-Lead P-DIP N-16 AD7304BR –40 °C/+85°C 16-Lead SOIC R-16 AD7304YR –40 °C/+125°C 16-Lead SOIC R-16 AD7304BRU –40 °C/+85°C TSSOP-16 RU-16 AD7305BN –40 °C/+85°C 20-Lead P-DIP N-20 AD7305BR –40 °C/+85°C 20-Lead SOIC R-20 AD7305YR –40 °C/+125°C 20-Lead SOIC R-20 AD7305BRU –40 °C/+85°C TSSOP-20 RU-20 The AD7304/AD7305 contains 2759 transistors. Die size: 103 mil × 102 mil, 10,506 sq mil. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7304/AD7305 features proprietary ESD protection circuitry, permanent dam- age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE |
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