MAX15090_13 datasheet(9/15 Pages) MAXIM

Part #	MAX15090

Description	2.7V to 18V, 12A, Hot-Swap Solution with Current Report Output

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Manufacturer	MAXIM [Maxim Integrated Products]

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Maxim Integrated

MAX15090/MAX15090A

2.7V to 18V, 12A, Hot-Swap Solution

with Current Report Output

Startup

Once the device output is enabled, the device provides

controlled application of power to the load. The voltage at

OUT begins to rise at approximately 10V/ms default until

the programmed circuit-breaker current level is reached,

while the devices actively limit the inrush current at the

circuit-breaker setting. An external capacitor connected

to the GATE pin allows the user to program the slew rate

to a value lower than the default. The inrush current can

be programmed by selecting the appropriate value of

RCB. During startup, a foldback current limit is active to

protect the internal MOSFET to operate within the SOA

(Figure 2).

An internal 50ms timer starts counting when the devices

enter the startup phase. The devices complete the start-

up phase and enter normal operation mode if the voltage

at OUT rises above the precharge threshold (0.9 x VIN)

and (VGATE - VOUT) > 3V. An open-drain power-good

output (PG) goes high-impedance 16ms after the startup

successfully completes.

The thermal-protection circuit is always active and

the internal MOSFET immediately turned off when the

thermal-shutdown threshold condition is reached.

VariableSpeed/BiLevel Fault Protection

VariableSpeed/BiLevel fault protection incorporates com-

parators with different thresholds and response times to

monitor the load current (Figure 3). Protection is provided

in normal operation (after the startup period has expired)

by discharging the MOSFET gate in response to a fault

condition. During a fault condition, the MAX15090A enters

autoretry mode, while the MAX15090 latches off (see the

Autoretry and Latch-Off Fault Management section).

Enable Input (EN)

After a startup phase is successfully completed and

the power-good output asserted, the EN input has to

be pulled low (for at least 1ms) before the tDLY delay

elapses. If the EN input is not pulled low before the tDLY

elapses, then the devices turn off the internal MOSFET

immediately and a new cycle is required for entering

power-up mode. Connect a capacitor between CDLY

and GND to set a 1s/FF duration timeout delay. If this

function in is not implemented, connect EN to GND for

proper operation.

Table 1. Output Enable Truth Table

X = Don’t care.

VUV_TH and VOV_TH = 1.23V (typ).

Figure 1. Undervoltage/Overvoltage-Threshold Setting

POWER SUPPLY

PRECISION ANALOG INPUTS

OUT

VCC

UV

OV

VCC > VUVLO

VUV > VUV_TH

VOV < VOV_TH

On

VCC < VUVLO

X

Off

X

VUV < (VUV_TH - VUV_HYS)

X

Off

X

VOV > VOV_TH

Off

MAX15090

MAX15090A

IN

UV

OV

GND

1.23V

R1

R2

R3

CONTROL

LOGIC

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