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AD7450BRM Datasheet(PDF) 2 Page - Analog Devices

Part # AD7450BRM
Description  Differential Input, 1MSPS, 12-Bit ADC in 關SO-8 and S0-8
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7450BRM Datasheet(HTML) 2 Page - Analog Devices

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REV. PrJ
PRELIMINARY TECHNICAL DATA
–2–
Parameter
A Version
1
B Version
1
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
FIN = 300kHz Sine Wave,
fSAMPLE= 833kSPS, 1MSPS
Signal to (Noise + Distortion) Ratio
70
70
dB min
(SINAD)
2
Total Harmonic Distortion (THD)
2
-80
-80
dB max
Peak Harmonic or Spurious Noise
2
-80
-80
dB max
Intermodulation Distortion (IMD)
2
Second Order Terms
-78
-78
dB typ
Third Order Terms
-78
-78
dB typ
Aperture Delay
3
10
10
ns typ
Aperture Jitter
3
50
50
ps typ
Full Power Bandwidth
3
20
20
MHz typ
@ -3 dB
2.5
2.5
MHz typ
@ -0.1 dB
Common Mode Rejection Ratio
T B D
T B D
dB
(CMRR)
2
DC ACCURACY
Resolution
12
12
Bits
Integral Nonlinearity (INL)2
± 2
± 1
LSB max
Differential Nonlinearity (DNL)
2
± 1
± 1
LSB max
Guaranteed No Missed Codes to 12 Bits.
Zero Code Error
2
± 5
± 5
LSB max
Positive Gain Error2
± 5
± 5
LSB max
Negative Gain Error
2
± 5
± 5
LSB max
ANALOG INPUT
Full Scale Input Span
VIN+ - VIN -
Volts
2 x VREF
4
Absolute Input Voltage
VIN+
VCM
3 ± V
REF/2
Volts
VCM = VREF
VIN-
VCM
3 ± V
REF/2
Volts
VCM = VREF
DC Leakage Current
± 1
± 1
µA max
Input Capacitance
20
20
pF typ
When in Track
5
5
pF typ
When in Hold
REFERENCE INPUT
VREF Input Voltage
2.5
5
2.5
Volts
5 V supply (±1% tolerance for specified
performance)
1.25
6
1.25
Volts
3 V supply
(±1% tolerance for specified
performance)
DC Leakage Current
± 1
± 1
µA max
VREF Input Capacitance
15
15
pF typ
LOGIC INPUTS
Input High Voltage, VINH
2.4
2.4
V min
Input Low Voltage, VINL
0.8
0.8
V max
Input Current, IIN
± 1
± 1
µA max
Typically 10 nA, VIN = 0 V or VDD
Input Capacitance, CIN
7
10
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
2.8
2.8
V min
ISOURCE = 200µA
Output Low Voltage, VOL
0.4
0.4
V max
ISINK =200µA
Floating-State Leakage Current
±10
±10
µA max
Floating-State Output Capacitance
7
10
10
pF max
Output Coding
Two’s Complement
CONVERSION RATE
Conversion
Time
16
16
SCLK cycles 888ns with an 18MHz SCLK
1.07µs with a 15MHz SCLK
Track/Hold Acquisition Time
8
275
275
ns max
Sine Wave input
Throughput Rate
9
1
1
MSPS max
@ VDD = 5V
833
833
kSPS max
@ VDD = 3V
AD7450 - SPECIFICATIONS1
( VDD = 2.7V to 3.3V, fSCLK = 15MHz, fS = 833kHz, VREF = 1.25 V;
VDD = 4.75V to 5.25V, fSCLK = 18MHz, fS = 1MHz, VREF = 2.5 V;
VCM
3 = V
REF; TA = TMIN to TMAX, unless otherwise noted.)


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