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AD7538 Datasheet(PDF) 2 Page - Analog Devices

Part # AD7538
Description  LC2MOS uP-Compatible 14-Bit DAC
Download  8 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7538 Datasheet(HTML) 2 Page - Analog Devices

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REV. A
–2–
AD7538–SPECIFICATIONS1
J, K
A, B
Parameter
Versions
Versions
S Version
T Version
Units
Test Conditions/Comments
ACCURACY
Resolution
14
14
14
14
Bits
Relative Accuracy
±2
±1
±2
±1
LSB max
All Grades Guaranteed Monotonic
Differential Nonlinearity
±1
±1
±1
±1
LSB max
Over Temperature.
Full-Scale Error
Measured Using Internal RFB DAC
+25
°C
±4
±4
±4
±4
LSB max
Registers Loaded with All 1s.
TMIN to TMAX
±8
±5
±10
±6
LSB max
Gain Temperature Coefficient
3;
∆Gain/∆Temperature
±2
±2
±2
±2
ppm/
°C typ
Output Leakage Current IOUT (Pin 3)
+25
°C
±5
±5
±5
±5
nA max
All Digital Inputs 0 V
TMIN to TMAX
±10
±10
±20
±20
nA max
VSS = –300 mV
TMIN to TMAX
±25
±25
±150
±150
nA max
VSS = 0 V
REFERENCE INPUT
Input Resistance, Pin 1
3.5
3.5
3.5
3.5
k
Ω min
Typical Input Resistance = 6 k
10
10
10
10
k
Ω max
DIGITAL INPUTS
VIH (Input High Voltage)
2.4
2.4
2.4
2.4
V min
VIL (Input Low Voltage)
0.8
0.8
0.8
0.8
V max
IIN (Input Current)
+25
°C
±1
±1
±1
±1
µA max
VIN = 0 V or VDD
TMIN to TMAX
±10
±10
±10
±10
µA max
CIN (Input Capacitance)
3
7
7
7
7
pF max
POWER SUPPLY
VDD Range
11.4/15.75
11.4/15.75
11.4/15.75
11.4/15.75
V min/V max
Specification Guaranteed Over
VSS Range
–200/–500
–200/–500
–200/–500
–200/–500
mV min/mV max
This Range
IDD
4
4
4
4
mA max
All Digital Inputs VIL or VIH
500
500
500
500
µA max
All Digital Inputs 0 V or VDD
AC PERFORMANCE CHARACTERISTICS
Parameter
TA = +25 C TA = TMIN, TMAX
Units
Test Conditions/Comments
Output Current Settling Time
1.5
µs max
To 0.003% of Full-Scale Range.
IOUT Load= 100
Ω, C
EXT = 13 pF.
DAC Register Alternately Loaded
with All 1s and All 0s. Typical Value
of Settling Time Is 0.8
µs.
Digital to Analog Glitch Impulse
20
nV-sec typ
Measured with VREF = 0 V. IOUT Load
= 100
Ω, C
EXT = 13 pF. DAC Register
Alternately Loaded with All 1s and All 0s.
Multiplying Feedthrough Error
3
5
mV p-p typ
VREF =
±10 V, 10 kHz Sine Wave DAC
Register Loaded with All 0s.
Power Supply Rejection
∆Gain/∆V
DD
±0.01
±0.02
% per % max
∆V
DD =
±5%
Output Capacitance
COUT (Pin 3)
260
260
pF max
DAC Register Loaded with All 1s
COUT (Pin 3)
130
130
pF max
DAC Register Loaded with All 0s
Output Noise Voltage Density
(10 Hz–100 kHz)
15
nV
√Hz typ
Measured Between RFB and IOUT
NOTES
Temperature range as follows: J, K Versions: 0
°C to +70°C
A, B Versions: –25
°C to +85°C
S, T Versions: –55
°C to +125°C
2Specifications are guaranteed for a V
DD of +11.4 V to +15.75 V. At VDD = 5 V, the device is fully functional with degraded specifications.
3Sample tested to ensure compliance.
Specifications subject to change without notice.
These characteristics are included for Design Guidance only and are not sub-
ject to test. (VDD = +11.4 V to +15.75 V, VREF = +10 V, VPIN3 = VPIN4 = O V, VSS =
O V or –300 mV, Output Amplifier is AD711 except where noted.)
(VDD = +11.4 V to +15.75 V
2, V
REF = +10 V; VPIN3 = VPIN4 = 0 V,
VSS = –300 mV. All specifications TMIN to TMAX unless otherwise noted.)


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