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AD7418AR-REEL Datasheet(PDF) 3 Page - Analog Devices |
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AD7418AR-REEL Datasheet(HTML) 3 Page - Analog Devices |
3 / 20 page REV. G AD7416/AD7417/AD7418 –3– NOTES 1B Version applies to AD7417 only with temperature range of –40 °C to +85°C. A Version temperature range is –40°C to +125°C. For V DD = 2.7 V, TA = 85 °C max and temperature sensor measurement error = ±3°C. 2See Terminology. 3Refers to the input current when the part is not converting. Primarily due to reverse leakage current in the ESD protection diodes. 4Sample tested during initial release and after any redesign or process change that may affect this parameter. 5On-chip reference shuts down when external reference is applied. 6The accuracy of the temperature sensor is affected by reference tolerance. The relationship between the two is explained in the Temperature Sensor section. Specifications subject to change without notice. AD7416–SPECIFICATIONS (V DD = 2.7 V to 5.5 V, GND = 0 V, REFIN = 2.5 V, unless otherwise noted.) Parameter Min Typ Max Unit Test Conditions/Comments TEMPERATURE SENSOR AND ADC Accuracy ±2.0 °CT A = –25 °C to +100°C (VDD = 3 V min) 1 ±3.0 °CTA = –40°C to +125°C (VDD = 3 V min) 1 Resolution 10 Bits Temperature Conversion Time 40 µs Update Rate, tR 400 µs OTI Delay 1 × tR 6 × tR ms Depends on Fault Queue Setting Supply Current 1.0 mA I 2C Active 350 600 µAI2C Inactive 0.2 1.5 µA Shutdown Mode TOTI Default Temperature 80 °C THYST Default Temperature 75 °C DIGITAL INPUTS Input High Voltage, VIH VDD × 0.7 VDD + 0.5 V Input Low Voltage, VIL –0.3 VDD × 0.3 V Input High Current, IIH +0.005 +1.0 µAV IN = 5 V Input Low Current, IIL –0.005 –1.0 µAVIN = 0 V Input Capacitance, CIN 20 pF All Digital Inputs DIGITAL OUTPUTS Output Low Voltage, VOL 0.4 V IOL = 3 mA Output High Current 1 µAV OH = 5 V Output Fall Time, tf 250 ns CL = 400 pF, IO = 3 mA OS Output Low Voltage, VOL 0.8 V IOUT = 4 mA AC ELECTRICAL CHARACTERISTICS 2 AD7416/AD7417/AD7418 Serial Clock Period, t1 2.5 µs See Figure 1 Data In Setup Time to SCL High, t2 50 ns See Figure 1 Data Out Stable after SCL Low, t3 0ns See Figure 1 SDA Low Setup Time to SCL Low (Start Condition), t4 50 ns See Figure 1 SDA High Hold Time after SCL High (Stop Condition), t5 50 ns See Figure 1 SDA and SCL Fall Time, t6 300 ns See Figure 1 NOTES 1For V DD = 2.7 V to 3 V, TA max = 85 °C and accuracy = ±3°C. 2Sample tested during initial release and after any redesign or process change that may affect this parameter. Specifications subject to change without notice. t4 t2 t3 t5 SCL SDA DATA IN SDA DATA OUT t6 t1 Figure 1. Diagram for Serial Bus Timing |
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