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PCA9554B Datasheet(PDF) 9 Page - NXP Semiconductors

Part # PCA9554B
Description  Low-voltage 8-bit I2C-bus and SMBus low power I/O port with interrupt, weak pull-up
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9554B Datasheet(HTML) 9 Page - NXP Semiconductors

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PCA9554B_PCA9554C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 19 September 2012
9 of 36
NXP Semiconductors
PCA9554B; PCA9554C
Low-voltage 8-bit I2C-bus/SMBus low power I/O port
7.
Bus transactions
The PCA9554B/PCA9554C is an I2C-bus slave device. Data is exchanged between the
master and PCA9554B/PCA9554C through write and read commands using I2C-bus. The
two communication lines are a serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up resistor when connected to the
output stages of a device. Data transfer may be initiated only when the bus is not busy.
7.1 Write commands
Data is transmitted to the PCA9554B/PCA9554C by sending the device address and
setting the Least Significant Bit (LSB) to a logic 0 (see Figure 4 for device address). The
command byte is sent after the address and determines which register receives the data
that follows the command byte. There is no limitation on the number of data bytes sent in
one write transmission.
(1) PCA9554B address shown. Address for PCA9554C is 0111,A2,A1,A0.
Fig 7.
Write to Output port register
0
A
S
slave address(1)
START condition
R/W
acknowledge
from slave
002aah124
0000001
0
command byte
A
acknowledge
from slave
12345678
SCL
9
SDA
DATA 1
A
write to port
data out from port
tv(Q)
acknowledge
from slave
DATA 1 VALID
data to port
1
0
0
A2 A1 A0
0
P
STOP
condition
(1) PCA9554B address shown. Address for PCA9554C is 0111,A2,A1,A0.
Fig 8.
Write to Configuration or Polarity inversion registers
0
A
S
slave address(1)
START condition
R/W
acknowledge
from slave
002aah125
0
0
0
0
0 1/0 1/0
0
command byte
A
acknowledge
from slave
12345678
SCL
9
SDA
DATA 1
A
acknowledge
from slave
data to register
1
0
0
A2 A1 A0
0
P
STOP
condition


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