AD7871/AD7872

–6–

REV. D

CONVERTER DETAILS

The AD7871/AD7872 is a complete 14-bit A/D converter, re-

quiring no external components apart from power supply

decoupling capacitors. It is comprised of a 14-bit successive ap-

proximation ADC based on a fast settling voltage-output DAC,

a high speed comparator and CMOS SAR, a track/hold ampli-

fier, a 3 V buried Zener reference, a clock oscillator and control

logic.

INTERNAL REFERENCE

The AD7871/AD7872 has an on-chip temperature compensated

buried Zener reference that is factory trimmed to 3 V

± 10 mV.

Internally it provides both the DAC reference and the dc bias

required for bipolar operation. Reference noise is minimized by

operation this capacitor should be 10 nF. The reference output

is available (REF OUT) and capable of providing up to 500

µA to

an external load.

The maximum recommended capacitance on REF OUT for

normal operation is 50 pF. If the reference is required for use

external to the AD7871/AD7872, it should be decoupled with a

200

Ω resistor in series with a parallel combination of a 10 µF

tantalum capacitor and a 0.1

µF ceramic capacitor. These

decoupling components are required to remove voltage spikes

caused by the AD7871/AD7872’s internal operation.

Figure 3. Reference Circuit

TRACK-AND-HOLD AMPLIFIER

The track-and-hold amplifier on the analog input of the

AD7871/AD7872 allows the ADC to accurately convert an in-

put sine wave of 6 V peak-peak amplitude to 14-bit accuracy.

The input bandwidth of the track/hold amplifier is much greater

than the Nyquist rate of the ADC even when the ADC is oper-

ated at its maximum throughput rate. The 0.1 dB cutoff fre-

quency occurs typically at 500 kHz. The track/hold amplifier

acquires an input signal to 14-bit accuracy in less than 2

µs. The

overall throughput rate is determined by the conversion time

plus the track/hold amplifier acquisition time. For a 2 MHz

input clock the throughput time is 12

µs maximum.

Figure 4. Analog Input

The operation of the track/hold amplifier is essentially transpar-

ent to the user. The track/hold amplifier goes from its tracking

mode to its hold mode at the start of conversion. If the

CONVST input is used to start conversion, then the track to

hold transition occurs on the rising edge of

CONVST. If CS on

the AD7871 starts conversion, this transition occurs on the fall-

ing edge of

CS.

ANALOG INPUT

Figure 4 shows the AD7871/AD7872 analog input. The analog

input range is

±3 V into an input resistance of typically 15 kΩ.

The designed code transitions occur midway between successive

integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs . . . FS

–3/2 LSBs). The output code is twos-complement binary with

1 LSB = FS/16384 = 6 V/16384 = 366

µV. The ideal input/out-

put transfer function is shown in Figure 5.

Figure 5. Bipolar Input/Output Transfer Function

BIPOLAR OFFSET AND FULL-SCALE ADJUSTMENT

When the AD7871/AD7872’s offset and full-scale errors need to

be adjusted, offset error must be adjusted first. This is achieved

by trimming the offset of the op amp driving the analog input of

the AD7871/AD7872 while the input voltage is 1/2 LSB below

AGND. The trim procedure is as follows: apply a voltage of

offset voltage until the ADC output code flickers between 11

1111 1111 1111 and 00 0000 0000 0000.

Figure 6. Bipolar Adjust Circuit