AD797

REV. C

–8–

This matching benefits not just dc precision but since it holds

up dynamically, both distortion and settling time are also

reduced. This single stage has a voltage gain of >5

µV, while at the same time providing THD + noise of

less than –120 dB and true 16 bit settling in less than 800 ns.

The elimination of second stage noise effects has the additional

benefit of making the low noise of the AD797 (<0.9 nV/

√Hz)

extend to beyond 1 MHz. This means new levels of perfor-

mance for sampled data and imaging systems. All of this perfor-

mance as well as load drive in excess of 30 mA are made

possible by Analog Devices’ advanced Complementary Bipolar

(CB) process.

Another unique feature of this circuit is that the addition of a

tion due to the output stage. This can best be explained by

referring to a simplified representation of the AD797 using ide-

alized blocks for the different circuit elements (Figure 29).

A single equation yields the open-loop transfer function of this

amplifier, solving it (at Node B) yields:

=

gm

A

j

ω – C

A

j

ω

gm = the transconductance of Q1 and Q2

A = the gain of the output stage, (~1)

response:

=

gm

j

ωC

The terms in A, which include the properties of the output

stage such as output impedance and distortion, cancel by

simple subtraction, and therefore the distortion cancellation

does not affect the stability or frequency response of the ampli-

fier. With only 500

µA of output stage bias the AD797 delivers

a 1 kHz sine wave into 600

Ω at 7 V rms with only 1 ppm of

distortion.

I1

I2

+IN

Q1

Q2

I3

–IN

I4

OUT

C

B

CURRENT

MIRROR

1

A

A

Figure 29. AD797 Block Diagram

THEORY OF OPERATION

The new architecture of the AD797 was developed to overcome

inherent limitations in previous amplifier designs. Previous pre-

cision amplifiers used three stages to ensure high open-loop

gain, Figure 27b, at the expense of additional frequency com-

pensation components. Slew rate and settling performance are

usually compromised, and dynamic performance is not ad-

equate beyond audio frequencies. As can be seen in Figure 27b,

the first stage gain is rolled off at high frequencies by the com-

pensation network. Second stage noise and distortion will then

appear at the input and degrade performance. The AD797 on

the other hand, uses a single ultrahigh gain stage to achieve dc

as well as dynamic precision. As shown in the simplified sche-

matic (Figure 28), nodes A, B, and C all track in voltage forcing

the operating points of all pairs of devices in the signal path to

match. By exploiting the inherent matching of devices fabricated

on the same IC chip, high open-loop gain, CMRR, PSRR, and

NPN to NPN & PNP to PNP), and not absolute parameters

such as beta and early voltage.

R1

C1

BUFFER

gm

a.

gm

R1

C1

GAIN = gmR1 *A2 *A3

R2

A2

A3

C2

BUFFER

b.

Figure 27. Model of AD797 vs. That of a Typical

Three-Stage Amplifier

R2

R3

+IN

Q1

Q2

I1

–IN

Q5

I7

Q6

I4

Q7

R1

Q3

Q4

Q12

I5

Q8

Q9

I6

Q11

Q10

OUT

C

A

B

Figure 28. AD797 Simplified Schematic