AD823

REV. 0

–11–

THEORY OF OPERATION

This AD823 is fabricated on Analog Devices’ proprietary

complementary bipolar (CB) process that enables the construc-

to 800 MHz region. In addition, the process also features

N-channel JFETs, which are used in the input stage of the AD823.

These process features allow the construction of high frequency,

low distortion op amps with picoampere input currents. This

design uses a differential-output input stage to maximize band-

width and headroom (see Figure 35). The smaller signal swings

required on the S1P, S1N outputs reduce the effect of nonlinear

currents due to junction capacitances and improve the distortion

performance. With this design harmonic distortion of better

than –91 dB @ 20 kHz into 600

Ω with V

single 5 volt supply is achieved. The complementary common-

emitter design of the output stage provides excellent load drive

without the need for emitter followers, thereby improving the

output range of the device considerably with respect to conven-

tional op amps. The AD823 can drive 20 mA with the outputs

within 0.6 V of the supply rails. The AD823 also offers out-

standing precision for a high speed op amp. Input offset voltages

of 1 mV max and offset drift of 2

µV/°C are achieved through

the use of Analog Devices’ advanced thin-film trimming

techniques.

A “Nested Integrator” topology is used in the AD823 (see small-

signal schematic shown in Figure 36). The output stage can be

modeled as an ideal op amp with a single-pole response and a

put transconductance. C1 and C5 provide Miller compensation

for the overall op amp. The unity gain frequency will occur at

V

OUT

Vi

=

A0

(sR1[C1( A2 + 1)] + 1)

× s

g

m2

C2











 + 1









where:

R42

R37

J1

J6

I1

C6

R33

I2

R43

I3

Q56

S1P

Q72

Q61

Q46

I5

S1N

Q53

Q35

Q48

Q21

Q62

Q60

Q54

R44

R28

Q52

I4

Q59

A=1

C1

Q17

A=19

C2

Q18

Q49

Q55

Q43

I6

Q44

A=1

Q57

A=19

Q58

V1

Figure 35. Simplified Schematic

10V

–10V

500ns

5V