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AD8554 Datasheet(PDF) 11 Page - Analog Devices |
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AD8554 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 20 page  AD8551/AD8552/AD8554 –11– REV. 0 VIN+ VIN VOUT AB AA A B VOSA + BB CM2 CM1 A B VNB VNA BA VOA Figure 45. Output Phase of the Amplifier Because φA is now open and there is no place for C M1 to dis- charge, the voltage VNA at the present time t is equal to the voltage at the output of the nulling amp VOA at the time when φA was closed. If we call the period of the autocorrection switching frequency TS, then the amplifier switches between phases every 0.5 TS. Therefore, in the amplification phase: Vt V t T NA NA S [] =− 1 2 (4) And substituting Equation 4 and Equation 2 into Equation 3 yields: Vt A V t A V t AB V t T B OA A IN A OSA A A OSA S A [] = []+ []− − + 1 2 1 (5) For the sake of simplification, let us assume that the autocorrection frequency is much faster than any potential change in VOSA or VOSB. This is a good assumption since changes in offset voltage are a function of temperature variation or long-term wear time, both of which are much slower than the auto-zero clock frequency of the AD855x. This effectively makes VOS time invariant and we can re- arrange Equation 5 and rewrite it as: Vt A V t AB V A B V B OA A IN A A OSA A A OSA A [] = []+ + () − + 1 1 (6) or, Vt A V t V B OA A IN OSA A [] = []+ + 1 (7) We can already get a feel for the autozeroing in action. Note the VOS term is reduced by a 1 + BA factor. This shows how the nulling amplifier has greatly reduced its own offset voltage error even before correcting the primary amplifier. Now the primary amplifier output voltage is the voltage at the output of the AD855x amplifier. It is equal to: Vt A V t V B V OUT B IN OSB B NB [] = []+ ()+ (8) In the amplification phase, VOA = VNB, so this can be rewritten as: Vt A V t A V B A V t V B OUT B IN B OSB B A IN OSA A [] = []++ []+ + 1 (9) Combining terms, Vt V t A A B AB V B AV OUT IN B A B A B OSA A B OSB [] = [] + ()+ + + 1 (10) The AD855x architecture is optimized in such a way that AA = AB and BA = BB and BA >> 1. Also, the gain product of AABB is much greater than AB. These allow Equation 10 to be simplified to: Vt V t A B A V V OUT IN A A A OSA OSB []≈ [] ++ () (11) Most obvious is the gain product of both the primary and nulling amplifiers. This AABA term is what gives the AD855x its extremely high open-loop gain. To understand how VOSA and VOSB relate to the overall effective input offset voltage of the complete amplifier, we should set up the generic amplifier equation of: Vk V V OUT IN OS EFF =× + () , (12) Where k is the open-loop gain of an amplifier and VOS, EFF is its effective offset voltage. Putting Equation 12 into the form of Equation 11 gives us: Vt V t A B V A B OUT IN A A OS EFF A A []≈ [] + , (13) And from here, it is easy to see that: V VV B OS EFF OSA OSB A , ≈ + (14) Thus, the offset voltages of both the primary and nulling ampli- fiers are reduced by the gain factor BA. This takes a typical input offset voltage from several millivolts down to an effective input offset voltage of submicrovolts. This autocorrection scheme is what makes the AD855x family of amplifiers among the most precise amplifiers in the world. High Gain, CMRR, PSRR Common-mode and power supply rejection are indications of the amount of offset voltage an amplifier has as a result of a change in its input common-mode or power supply voltages. As shown in the previous section, the autocorrection architecture of the AD855x allows it to quite effectively minimize offset volt- ages. The technique also corrects for offset errors caused by common-mode voltage swings and power supply variations. This results in superb CMRR and PSRR figures in excess of 130 dB. Because the autocorrection occurs continuously, these figures can be maintained across the device’s entire temperature range, from –40 °C to +125°C. Maximizing Performance Through Proper Layout To achieve the maximum performance of the extremely high input impedance and low offset voltage of the AD855x, care should be taken in the circuit board layout. The PC board sur- face must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. The use of guard rings around the amplifier inputs will further reduce leak- age currents. Figure 46 shows how the guard ring should be configured and Figure 47 shows the top view of how a surface mount layout can be arranged. The guard ring does not need to |
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