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ADP3162JR Datasheet(PDF) 11 Page - Analog Devices |
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ADP3162JR Datasheet(HTML) 11 Page - Analog Devices |
11 / 12 page REV. A ADP3162 –11– LAYOUT AND COMPONENT PLACEMENT GUIDELINES The following guidelines are recommended for optimal perfor- mance of a switching regulator in a PC system. General Recommendations 1. For good results, at least a four-layer PCB is recommended. This should allow the needed versatility for control circuitry interconnections with optimal placement, a signal ground plane, power planes for both power ground and the input power (e.g., 5 V), and wide interconnection traces in the rest of the power delivery current paths. Keep in mind that each square unit of 1 ounce copper trace has a resistance of ~ 0.53 m Ω at room temperature. 2. Whenever high currents must be routed between PCB layers, vias should be used liberally to create several parallel current paths so that the resistance and inductance intro- duced by these current paths is minimized and the via current rating is not exceeded. 3. If critical signal lines (including the voltage and current sense lines of the ADP3162) must cross through power circuitry, it is best if a signal ground plane can be inter- posed between those signal lines and the traces of the power circuitry. This serves as a shield to minimize noise injection into the signals at the expense of making signal ground a bit noisier. 4. The power ground plane should not extend under signal components, including the ADP3162 itself. If necessary, follow the preceding guideline to use the signal ground plane as a shield between the power ground plane and the signal circuitry. 5. The GND pin of the ADP3162 should be connected first to the timing capacitor (on the CT pin), and then into the signal ground plane. In cases where no signal ground plane can be used, short interconnections to other signal ground circuitry in the power converter should be used. 6. The output capacitors of the power converter should be connected to the signal ground plane even though power current flows in the ground of these capacitors. For this reason, it is advised to avoid critical ground connections (e.g., the signal circuitry of the power converter) in the signal ground plane between the input and output capaci- tors. It is also advised to keep the planar interconnection path short (i.e., have input and output capacitors close together). 7. The output capacitors should also be connected as closely as possible to the load (or connector) that receives the power (e.g., a microprocessor core). If the load is distributed, the capacitors also should be distributed, and generally in pro- portion to where the load tends to be more dynamic. 8. Absolutely avoid crossing any signal lines over the switching power path loop, described below. Power Circuitry 9. The switching power path should be routed on the PCB to encompass the smallest possible area in order to minimize radiated switching noise energy (i.e., EMI). Failure to take proper precaution often results in EMI problems for the entire PC system as well as noise-related operational problems in the power converter control circuitry. The switching power path is the loop formed by the current path through the input capacitors, the power MOSFETs, and the power Schottky diode, if used (see next), including all intercon- necting PCB traces and planes. The use of short and wide interconnection traces is especially critical in this path for two reasons: it minimizes the inductance in the switching loop, which can cause high-energy ringing, and it accommodates the high current demand with minimal voltage loss. 10. An optional power Schottky diode (3 A–5 A dc rating) from each lower MOSFET’s source (anode) to drain (cathode) will help to minimize switching power dissipation in the upper MOSFETs. In the absence of an effective Schottky diode, this dissipation occurs through the following sequence of switching events. The lower MOSFET turns off in advance of the upper MOSFET turning on (necessary to prevent cross-conduction). The circulating current in the power converter, no longer finding a path for current through the channel of the lower MOSFET, draws current through the inherent body diode of the MOSFET. The upper MOSFET turns on, and the reverse recovery characteristic of the lower MOSFET’s body diode prevents the drain voltage from being pulled high quickly. The upper MOSFET then conducts very large current while it momentarily has a high voltage forced across it, which translates into added power dissipation in the upper MOSFET. The Schottky diode minimizes this problem by carrying a majority of the circu- lating current when the lower MOSFET is turned off, and by virtue of its essentially nonexistent reverse recovery time. The Schottky diode has to be connected with very short copper traces to the MOSFET to be effective. 11. A small ferrite bead inductor placed in series with the drain of the lower MOSFET can also help to reduce this previ- ously described source of switching power loss. 12. Whenever a power dissipating component (e.g., a power MOSFET) is soldered to a PCB, the liberal use of vias, both directly on the mounting pad and immediately sur- rounding it, is recommended. Two important reasons for this are: improved current rating through the vias, and improved thermal performance from vias extended to the opposite side of the PCB where a plane can more readily transfer the heat to the air. 13. The output power path, though not as critical as the switch- ing power path, should also be routed to encompass a small area. The output power path is formed by the current path through the inductor, the current sensing resistor, the out- put capacitors, and back to the input capacitors. 14. For best EMI containment, the power ground plane should extend fully under all the power components except the output capacitors. These components are: the input capaci- tors, the power MOSFETs and Schottky diodes, the inductors, the current sense resistor, and any snubbing element that might be added to dampen ringing. Avoid extending the power ground under any other circuitry or signal lines, including the voltage and current sense lines. |
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