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ADSP-2165BS-100 Datasheet(PDF) 1 Page - Analog Devices

Part # ADSP-2165BS-100
Description  DSP Microcomputers with ROM
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADSP-2165BS-100 Datasheet(HTML) 1 Page - Analog Devices

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Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADSP-216x
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
DSP Microcomputers with ROM
FUNCTIONAL BLOCK DIAGRAM
SERIAL PORTS
SPORT 1
SPORT 0
MEMORY
TIMER
SHIFTER
MAC
ALU
ARITHMETIC UNITS
DAG 2
DAG 1
DATA ADDRESS
GENERATORS
EXTERNAL
DATA
BUS
EXTERNAL
ADDRESS
BUS
PROGRAM
MEMORY
DATA
MEMORY
DATA MEMORY DATA
DATA MEMORY ADDRESS
PROGRAM MEMORY ADDRESS
PROGRAM MEMORY DATA
PROGRAM
SEQUENCER
ADSP-2100 CORE
SUMMARY
16-Bit Fixed-Point DSP Microprocessors with
On-Chip Memory
Enhanced Harvard Architecture for Three-Bus
Performance: Instruction Bus and Dual Data Buses
Independent Computation Units: ALU, Multiplier/
Accumulator and Shifter
Single-Cycle Instruction Execution and Multifunction
Instructions
On-Chip Program Memory ROM and Data Memory RAM
Integrated I/O Peripherals: Serial Ports, Timer
FEATURES
25 MIPS, 40 ns Maximum Instruction Rate (5 V)
Separate On-Chip Buses for Program and Data Memory
Program Memory Stores Both Instructions and Data
(Three-Bus Performance)
Dual Data Address Generators with Modulo and
Bit-Reverse Addressing
Efficient Program Sequencing with Zero-Overhead
Looping: Single-Cycle Loop Setup
Double-Buffered Serial Ports with Companding Hardware,
Automatic Data Buffering and Multichannel Operation
Three Edge- or Level-Sensitive Interrupts
Low Power IDLE Instruction
PLCC and MQFP Packages
GENERAL DESCRIPTION
The ADSP-216x Family processors are single-chip micro-
computers optimized for digital signal processing (DSP)
and other high speed numeric processing applications. The
ADSP-216x processors are all built upon a common core with
ADSP-2100. Each processor combines the core DSP architec-
ture—computation units, data address generators and program
sequencer—with features such as on-chip program ROM and
data memory RAM, a programmable timer and two serial ports.
The ADSP-2165/ADSP-2166 also adds program memory and
power-down mode.
This data sheet describes the following ADSP-216x Family
processors:
ADSP-2161/ADSP-2162/
ADSP-2163/ADSP-2164
Custom ROM-programmed DSPs:
ADSP-2165/ADSP-2166
ROM-programmed ADSP-216x
processors with power-down and
larger on-chip memories (12K Pro-
gram Memory ROM, 1K Program
Memory RAM, 4K Data Memory
RAM)
Fabricated in a high speed, submicron, double-layer metal
CMOS process, the highest-performance ADSP-216x proces-
sors operate at 25 MHz with a 40 ns instruction cycle time.
Every instruction can execute in a single cycle. Fabrication in
CMOS results in low power dissipation.
The ADSP-2100 Family’s flexible architecture and compre-
hensive instruction set support a high degree of parallelism.
In one cycle the ADSP-216x can perform all of the following
operations:
Generate the next program address
Fetch the next instruction
Perform one or two data moves
Update one or two data address pointers
Perform a computation
Receive and transmit data via one or two serial ports
Table I shows the features of each ADSP-216x processor.
The ADSP-216x series are memory-variant versions of the
ADSP-2101 and ADSP-2103 that contain factory-programmed
on-chip ROM program memory. These devices offer different
amounts of on-chip memory for program and data storage.
Table I shows the features available in the ADSP-216x series of
custom ROM-coded processors.
The ADSP-216x products eliminate the need for an external
boot EPROM in your system, and can also eliminate the need
for any external program memory by fitting the entire applica-
tion program in on-chip ROM. These devices thus provide an
excellent option for volume applications where board space and
system cost constraints are of critical concern.


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