Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

ADV473KP135 Datasheet(PDF) 9 Page - Analog Devices

Part # ADV473KP135
Description  CMOS 135 MHz True-Color Graphics Triple 8-Bit Video RAM-DAC
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV473KP135 Datasheet(HTML) 9 Page - Analog Devices

Back Button ADV473KP135 Datasheet HTML 4Page - Analog Devices ADV473KP135 Datasheet HTML 5Page - Analog Devices ADV473KP135 Datasheet HTML 6Page - Analog Devices ADV473KP135 Datasheet HTML 7Page - Analog Devices ADV473KP135 Datasheet HTML 8Page - Analog Devices ADV473KP135 Datasheet HTML 9Page - Analog Devices ADV473KP135 Datasheet HTML 10Page - Analog Devices ADV473KP135 Datasheet HTML 11Page - Analog Devices ADV473KP135 Datasheet HTML 12Page - Analog Devices  
Zoom Inzoom in Zoom Outzoom out
 9 / 12 page
background image
ADV473
–9–
REV. A
15-Bit True-Color Bypass Mode
Fifteen bits of pixel information may be input into the ADV473
every clock cycle. The 15 bits of pixel information (5 bits of red,
5 bits of green, and 5 bits of blue) are input via the R0–R7 and
G0–G7 inputs.
Table V. 15-Bit True-Color Video Input Format
Pixel
Input
Inputs
Format
R7
0
R6
R7
R5
R6
R4
R5
R3
R4
R2
R3
R1
G7
R0
G6
G7
G5
G6
G4
G5
G3
G4
B7
G3
B6
G2
B5
G1
B4
G0
B3
The 5 MSBs of the red, green, and blue DACs are driven di-
rectly by the inputs. The 3 LSBs are a logical zero. The color
palette RAMs and pixel read mask register are bypassed.
15-Bit True-Color Mode
Fifteen bits of pixel information may be input into the ADV473
every clock cycle. The 15 bits of pixel information are input to
the device via R0–R7 and G0–G7 according to Table V. This
input data points to the top 32 locations of the color palette
RAM, i.e., locations 223 to 255. The 15-bit pixel input data in-
dexes a 24-bit red, green and blue value which is clocked to the
three DACs.
Overlays
The overlay inputs, OL0–OL3, have priority regardless of the
color mode as shown in Table III.
Pixel Read Mask Register
The 8-bit pixel read mask register is implemented as three 8-bit
pixel read mask registers, one each for the R0–R7, G0–G7, and
B0–B7 inputs. When writing to the pixel read mask register, the
same data is written to all three registers. The read mask regis-
ters are located just before the color palette RAMs. Thus, they
are used only in the 24-bit true-color and 8-bit pseudo-color
modes since these are the only modes that use the color palette
RAMs.
The contents of the pixel read mask register, which may be
accessed by the MPU at any time, are bit-wise logically ANDed
with the 8-bit inputs prior to addressing the color palette RAMs.
Bit D0 of the pixel read mask register corresponds to pixel input
P0 (R0, G0, or B0 depending on the mode). Bit D0 also corre-
sponds to data bus Bit D0.
VIDEO MODES
24-Bit True-Color Mode
Twenty-four bits of RGB color information may be input into
the ADV473 every clock cycle. The 24 bits of pixel information
are input via the R0–R7, G0–G7, and B0–B7 inputs. R0–R7 ad-
dress the red color palette RAM, G0–G7 address the green
color palette RAM, and B0–B7 address the blue color palette
RAM. Each RAM provides 8 bits of color information to the
corresponding D/A converter. The pixel read mask register is
used in this mode.
24-Bit True-Color Bypass Mode
Twenty-four bits of pixel information may be input into the
ADV473 every clock cycle. The 24 bits of pixel information are
input via the R0–R7, G0–G7, and B0–B7 inputs. R0–R7 drive
the red DAC directly, G0–G7 drive the green DAC directly,
and B0–B7 drive the blue DAC directly. The color palette
RAMs and pixel read mask register are bypassed.
8-Bit Pseudo-Color Mode
Eight bits of pixel information may be input into the ADV473
every clock cycle. The 8 bits of pixel information (P0–P7) are
input via the R0–R7, G0–G7 or B0–B7 inputs, as specified by
CR7 and CR6. All three color palette RAMs are addressed by
the same 8 bits of pixel data (P0–P7). Each RAM provides 8
bits of color information to the corresponding D/A converter.
The pixel read mask register is used in this mode.
8-Bit True-Color Bypass Mode
Eight bits of pixel information may be input into the ADV473
every clock cycle. The 8 bits of pixel information are input via
the R0–R7, G0–G7 or B0–B7 inputs, as specified by CR7 and
CR6.
Table IV. 8-Bit True-Color Bypass Video Input Format
R0–R7
G0–G7
B0–B7
Inputs
Inputs
Input
Inputs
Selected
Selected
Selected
Format
R7
G7
B7
R7
R6
G6
B6
R6
R5
G5
B5
R5
R4
G4
B4
G7
R3
G3
B3
G6
R2
G2
B2
G5
R1
G1
B1
B7
R0
G0
B0
B6
As seen in the table, 3 bits of red, 3 bits of green, and 2 bits of
blue data are input. The 3 MSBs of the red and green DACs are
driven directly by the inputs, while the 2 MSBs of the blue DAC
are driven directly. The 5 LSBs for the red and green DACs,
and the 6 LSBs for the blue DAC, are a logical zero. The color
palette RAMs and pixel read mask register are bypassed.


Similar Part No. - ADV473KP135

ManufacturerPart #DatasheetDescription
logo
Analog Devices
ADV473 AD-ADV473 Datasheet
204Kb / 12P
   CMOS 135 MHz True-Color Graphics Triple 8-Bit Video RAM-DAC
REV. A
ADV473 AD-ADV473_15 Datasheet
204Kb / 12P
   CMOS 135 MHz True-Color Graphics Triple 8-Bit Video RAM-DAC
REV. A
More results

Similar Description - ADV473KP135

ManufacturerPart #DatasheetDescription
logo
Analog Devices
ADV473 AD-ADV473_15 Datasheet
204Kb / 12P
   CMOS 135 MHz True-Color Graphics Triple 8-Bit Video RAM-DAC
REV. A
ADV7152 AD-ADV7152_15 Datasheet
335Kb / 32P
   CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC
REV. B
ADV7150 AD-ADV7150 Datasheet
447Kb / 36P
   CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC
REV. A
ADV7152 AD-ADV7152 Datasheet
454Kb / 32P
   CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC
REV. B
ADV7151 AD-ADV7151 Datasheet
1Mb / 32P
   CMOS 220 MHz Pseudo-Color Graphics Triple 10-Bit Video RAM-DAC
REV. A
ADV7151 AD-ADV7151_15 Datasheet
1Mb / 32P
   CMOS 220 MHZ PSEUDO COLOR GRAPHICS TRIPLE 10 BIT VIDEO RAM DAC
REV. A
ADV7160 AD-ADV7160 Datasheet
668Kb / 44P
   96-Bit, 220 MHz True-Color Video RAM-DAC
REV. 0
ADV7160 AD-ADV7160_15 Datasheet
669Kb / 44P
   96-Bit, 220 MHz True-Color Video RAM-DAC
REV. 0
ADV7162 AD-ADV7162_15 Datasheet
669Kb / 44P
   96-Bit, 220 MHz True-Color Video RAM-DAC
REV. 0
ADV7120KSTZ50 AD-ADV7120KSTZ50 Datasheet
191Kb / 12P
   CMOS 80 MHz, Triple 8-Bit Video DAC
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com