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ISL8002 Datasheet(PDF) 4 Page - Intersil Corporation |
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ISL8002 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 22 page ISL8002, ISL8002A, ISL80019, ISL80019A 4 FN7888.1 January 7, 2013 Pin Configuration ISL8002, ISL8002A, ISL80019, ISL80019A (8 LD 2x2 TDFN) TOP VIEW PAD 1 3 4 VIN MODE COMP 2 FB PGND PG EN 7 5 6 8 PHASE PAD PIN 9 THERMAL (GND) Pin Descriptions PIN NUMBER SYMBOL PIN DESCRIPTION 1 VIN The input supply for the power stage of the PWM regulator and the source for the internal linear regulator that provides bias for the IC. Place a minimum of 10µF ceramic capacitance from VIN to GND and as close as possible to the IC for decoupling. 2 EN Device enable input. When the voltage on this pin rises above 0.6V, the device is enabled. The device is disabled when the pin is pulled to ground. When the device is disabled, a 100Ω resistor discharges the output through the PHASE pin. See Figure 3, “FUNCTIONAL BLOCK DIAGRAM” on page 5 for details. 3 MODE Mode selection pin. Connect to logic high or input voltage VIN for PWM mode. Connect to logic low or ground for PFM mode. There is an internal 1MΩ pull-down resistor to prevent an undefined logic state in case the MODE pin is left floating, however, it is not recommended to leave this pin floating. 4 PG Power Good output is pulled to ground during the soft-start interval and also when the output voltage is below regulation limits. There is an internal 5MΩ internal pull-up resistor on this pin. 5 COMP COMP is the output of the error amplifier. When COMP is tied high to VIN, compensation is internal. When COMP is connected with a series resistor and capacitor to GND, compensation is external. See “Loop Compensation Design” on page 19 for more detail. 6 FB Feedback pin for the regulator. FB is the negative input to the voltage loop error amplifier. The output voltage is set by an external resistor divider connected to FB. In addition, the Power Good PWM regulator’s power-good and Undervoltage protection circuits use FB to monitor the output voltage. 7 PGND Power and analog ground connections. Connect directly to the board GROUND plane. 8 PHASE Power stage switching node for output voltage regulation. Connect to the output inductor. This pin is discharged by an 100Ω resistor when the device is disabled. See Figure 3, “FUNCTIONAL BLOCK DIAGRAM” on page 5 for details. 9THERMAL PAD (T-PAD) Power ground. This thermal pad provides a return path for the power stage and switching currents, as well as a thermal path for removing heat from the IC to the board. Place thermal vias to the PGND plane in this pad. |
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