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TPS25910 Datasheet(PDF) 6 Page - Texas Instruments |
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TPS25910 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 25 page GND OUT IN IN IN GATE OUT OUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 RSA-16 Package (Top View) Thermal Pad TPS25910 SLUSAR6B – SEPTEMBER 2012 – REVISED MARCH 2013 www.ti.com TPS25910 PIN ASSIGNMENT PIN FUNCTIONS PIN NAME PIN NUMBER DESCRIPTION EN 16 Device is enabled when this pin is pulled low. IN 1, 2, 3 Power In and control supply voltage. If the chip die temperature exceeds the OTSD rising threshold, GATE is pulled down to GND by a GATE 4 7.5KOhm resistor. ILIM 7 A resistor to ground sets the current limit level. GND 5, 6, 8, 9, 13, 14 GND OUT 10, 11, 12 Output to the load. Fault low indicates that the internal pass FET junction temperature exceeds the thermal shutdown FLT 15 threshold 6 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: TPS25910 |
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