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TPS51604 Datasheet(PDF) 4 Page - Texas Instruments |
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TPS51604 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 20 page  TPS51604 SLUSBA6 – DECEMBER 2012 www.ti.com ELECTRICAL CHARACTERISTICS These specifications apply for TJ = –40°C to 105°C and VDD = 5.0V unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS VDD INPUT SUPPLY VSKIP = VVDD or VSKIP = 0 V, PWM = High 160 600 VSKIP = VVDD or VSKIP = 0 V, PWM = Low 250 ICC Supply current (operating) µA VSKIP = VVDD or VSKIP = 0 V, PWM = Float 130 VSKIP = Float 8 VDD UNDERVOLTAGE LOCKOUT (UVLO) Rising threshold 4.15 VUVLO UVLO threshold V Falling threshold 3.7 VUVHYS UVLO hysteresis 0.2 V PWM AND SKIP I/O SPECIFICATIONS Pull up to VDD 1.7 M Ω RI Input impedance Pull down (to GND) 800 k Ω VIL Low-level input voltage 0.6 VIH High-level input voltage 2.65 V VIHH Hysteresis 0.2 VTS Tri-state voltage 1.3 2.0 Tri-state activation time (falling) tTHOLD(off1) 60 PWM ns Tri-state activation time (rising) tTHOLD(off2) 60 PWM Tri-state activation time (falling) tTSKF 1 SKIP µs Tri-state activation time (rising) tTSKR 1 SKIP t3RD(PWM) Tri-state exit time PWM 100 ns t3RD(SKIP) Tri-state exit time SKIP 50 µs HIGH-SIDE GATE DRIVER (DRVH) tR(DRVH) Rise time DRVH rising, CDRVH = 3.3 nF; 20% to 80% 30 ns tRPD(DRVH) Rise time propogation delay CDRVH = 3.3 nF 40 ns Source resistance, (VBST– VSW) = 5 V, high state, RSRC Source resistance 4 8 Ω (VBST–VDRVH) = 0.1 V tF(DRVH) Fall time DRVH falling, CDRVH = 3.3 nF 8 ns tFPD(DRVH) Fall-time propagation delay CDRVH = 3.3 nF 25 ns Sink resistance, (VBST–VSW) forced to 5 V, low state RSNK Sink resistance 0.5 1.6 Ω (VDRVH–VSW) = 0.1 V RDRVH DRVH to SW resistance(1) 100 k Ω LOW-SIDE GATE DRIVER (DRVL) tR(DRVL) Rise time DRVL rising, CDRVL = 3.3 nF; 20% to 80% 15 ns tRPD(DRVL) Rise time propogation delay CDRVL = 3.3 nF 35 ns Source resistance, (VVDD–GND) = 5 V, high state, RSRC Source resistance 1.5 3 Ω (VVDD–VDRVL) = 0.1 V tF(DRVL) Fall time DRVL falling, CDRVL = 3.3 nF 10 ns tFPD(DRVL) Fall-time propagation delay CDRVL= 3.3 nF 15 ns Sink resistance, (VVDD– GND) = 5 V, low state, RSNK Sink resistance 0.4 1.6 Ω (VDRVL–GND) = 0.1 V RDRVL DRVL to GND resistance(1) 100 k Ω (1) Specified by design. Not production tested. 4 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: TPS51604 |
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