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OP275GP Datasheet(PDF) 9 Page - Analog Devices |
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OP275GP Datasheet(HTML) 9 Page - Analog Devices |
9 / 12 page OP275 REV. A –9– +15V + 0.1µF 2 3 8 1 4 VIN VOUT RL 2k Ω –15V 10µF 0.1µF 1/2 OP275 10µF + Figure 12. Unity Gain Follower 0.1µF +15V + 10µF 2 3 8 1 4 VIN VOUT 2k Ω –15V 10µF 0.1µF 10pF 4.99k Ω 2.49k Ω 4.99k Ω + 1/2 OP275 Figure 13. Unity Gain Inverter In inverting and noninverting applications, the feedback resis- tance forms a pole with the source resistance and capacitance (RS and CS) and the OP275’s input capacitance (CIN), as shown in Figure 14. With RS and RF in the kilohm range, this pole can create excess phase shift and even oscillation. A small capacitor, CFB, in parallel and RFB eliminates this problem. By setting RS (CS + CIN) = RFBCFB, the effect of the feedback pole is com- pletely removed. RFB CIN RS CS CFB VOUT Figure 14. Compensating the Feedback Pole Attention to Source Impedances Minimizes Distortion Since the OP275 is a very low distortion amplifier, careful atten- tion should be given to source impedances seen by both inputs. As with many FET-type amplifiers, the p-channel JFETs in the OP275’s input stage exhibit a gate-to-source capacitance that varies with the applied input voltage. In an inverting configura- tion, the inverting input is held at a virtual ground and, as such, does not vary with input voltage. Thus, since the gate-to-source voltage is constant, there is no distortion due to input capaci- tance modulation. In noninverting applications, however, the gate-to-source voltage is not constant. The resulting capacitance modulation can cause distortion above 1 kHz if the input im- pedance is > 2 k Ω and unbalanced. Figure 15 shows some guidelines for maximizing the distortion performance of the OP275 in noninverting applications. The best way to prevent unwanted distortion is to ensure that the parallel combination of the feedback and gain setting resistors (RF and RG) is less than 2 k Ω. Keeping the values of these resis- tors small has the added benefits of reducing the thermal noise 0P275 VIN VOUT RF RG RS* * RS = RG//RF IF RG//RF > 2kΩ FOR MINIMUM DISTORTION Figure 15. Balanced Input Impedance to Minimize Distortion in Noninverting Amplifier Circuits 16–20V 0.1µF V+ ±5V RL 1k Ω D1 D2 +15V 2N4416 1k Ω D3 D4 OUTPUT (TO SCOPE) 1µF 10k Ω IC2 RF 2k Ω 750 Ω 2N2222A 15k Ω –15V 1N4148 DUT 1/2 OP260AJ 16–20V 0.1µF 10k Ω –+ + – SCHOTTKY DIODES D1–D4 ARE HEWLETT-PACKARD HP5082-2835 IC1 IS 1/2 OP260AJ IC2 IS PMI OP41EJ V– RG 222 Ω Figure 11. OP275’s Settling Time Test Fixture |
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