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R11-0836 Datasheet(PDF) 4 Page - A-Data Technology |
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R11-0836 Datasheet(HTML) 4 Page - A-Data Technology |
4 / 16 page 4 AD3R1600W8G11 DDR3-1600(CL11) 240-Pin R-DIMM 8GB(1024M x 72-bits) General Description: The ADATA’s module is a 1024Mx72 bits 8GB(8192MB) DDR3-1600(CL11)-11-11-28 SDRAM memory module. The SPD is programmed to JEDEC standard latency 1600Mbps timing of 11-11-11-28 at 1.5V. The module is composed of eight-teen 512Mx8 bits CMOS DDR3 SDRAMs in FBGA package and one 2Kbit EEPROM in 8pin TDFN package on a 240pin glass–epoxy printed circuit board. The module is a Dual In-line Memory Module and intended for mounting onto 240-pins edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable latencies and burst lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. Features: • Power supply (Normal): VDD & VDDQ = 1.5V ± 0.075V • 1.5V (SSTL_15 compatible) I/O • MRS Cycle with address key programs - CAS Latency (5,6,7,8,9,10,11) - Burst Length (BL):8 and 4 with Burst Chop(BC) • Bi-directional, differential data strobe (DQS and /DQS) • Differential clock input (CK, /CK) operation • DLL aligns DQ and DQS transition with CK transition • Double-data-rate architecture; two data transfers per clock cycle • 8 independent internal bank • Internal (self) calibration: Internal self calibration through ZQ pin (RZQ:240 ohm±1%) • Auto refresh and self refresh • Average Refresh Period 7.8us at lower then TCASE 85°C, 3.9us at 85°C < TCASE ≤ 95°C • 8-bit pre-fetch. • On Die Termination using ODT pin. • Lead-free products are RoHS Compliant |
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Similar Description - R11-0836 |
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