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L7581 Datasheet(PDF) 3 Page - Agere Systems |
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L7581 Datasheet(HTML) 3 Page - Agere Systems |
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3 / 16 page  Data Sheet November 1999 Lucent Technologies Inc. 3 L7581 Ringing Access Switch Pin Information (continued) Table 1. Pin Descriptions DIP SOG Symbol Description DIP SOG Symbol Description 11 FGND Fault ground. 16 16 VBAT Battery voltage. Used as a ref- erence for protection circuit. 2 4 NC No connection. 15 13 NC No connection. 32 TBAT Connect to TIP on SLIC side. 14 15 RBAT Connect to RING on SLIC side. 43 TLINE Connect to TIP on line side. 13 14 RLINE Connect to RING on line side. 56 TRINGING Connect to return ground for ringing generator. 12 12 RRINGING Connect to ringing generator. 67 VDD 5 V supply. 11 11 LATCH Data latch control, active-high, transparent low. 7 5 NC No connection. 10 10 INPUT Logic level input switch control. 88 TSD Temperature shutdown pin. Can be used as a logic level input or output. See Table 12, Truth Table, and the Switching Behav- ior section of this data sheet for input pin description. As an out- put, will read 5 V when device is in its operational mode and 0 V in the thermal shutdown mode. In the L7581, the thermal shut- down mechanism cannot be dis- abled. 99 DGND Digital ground. Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Table 2. Absolute Maximum Ratings Parameters Handling Precautions Although protection circuitry has been designed into this device, proper precautions should be taken to avoid exposure to electrostatic discharge (ESD) during handling and mounting. Lucent Technologies Micro- electronics Group employs a human-body model (HBM) and a charged-device model (CDM) for ESD- susceptibility testing and protection design evaluation. ESD voltage thresholds are dependent on the circuit parameters used to define the model. No industry-wide standard has been adopted for CDM. However, a stan- dard HBM (resistance = 1500 Ω, capacitance = 100 pF) is widely used and therefore can be used for compari- son purposes. The HBM ESD threshold presented here was obtained by using these circuit parameters. Table 3. HBM ESD Threshold Voltage Parameter Min Max Unit Operating Temperature Range –40 110 °C Storage Temperature Range –40 150 °C Relative Humidity Range 5 95 % Pin Soldering Temperature — 10 °C 5 V Power Supply — 7 V Battery Supply — –85 V Logic Input Voltage — 7 V Input-to-output Isolation — 330 V Pole-to-pole Isolation — 330 V Device Rating L7581 1000 V |
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