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100315 Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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100315 Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 4 page www.fairchildsemi.com 2 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 3: ESD testing conforms to MIL-STD-883, Method 3015. DC Electrical Characteristics (Note 4) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Note 4: The specified limits represent the “worst case” value for the parameter. Since these “worst case” values normally occur at the temperature extremes, additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. AC Electrical Characteristics VEE = −4.2V to −4.8, VCC = VCCA = GND Note 5: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack- aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design. Storage Temperature −65°C to +150°C Maximum Junction Temperature (TJ) +150°C Case Temperature under Bias (TC)0°C to +85°C VEE Pin Potential to Ground Pin −7.0V to +0.5V Input Voltage (DC) VCC to +0.5V Output Current (DC Output HIGH) −50 mA Operating Range (Note 2) −5.7V to −4.2V ESD (Note 3) ≥2000V Case Temperature (TC)0°C to +85°C Supply Voltage (VEE) −5.7V to −4.2V Symbol Parameter Min Typ Max Units Conditions VOH Output HIGH Voltage −1025 −955 −870 mV VIN = VIH(Max) Loading with VOL Output LOW Voltage −1830 −1705 −1620 or VIL(Min) 50 Ω to −2.0V VOHC Output HIGH Voltage −1035 mV VIN = VIH(Min) Loading with VOLC Output LOW Voltage −1610 or VIL(Max) 50 Ω to −2.0V VIH Single-Ended Input HIGH Voltage −1165 −870 mV Guaranteed HIGH Signal for All Inputs VIL Single-Ended Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal for All Inputs IIL Input LOW Current 0.50 µAV IN = VIL(Min) IIH Input HIGH Current VIN = VIH(Max) CLKIN, CLKIN 150 µA TCLK 250 µA CLKSEL 250 µA VDIFF Input Voltage Differential 150 mV Required for Full Output Swing VCM Common Mode Voltage VCC − 2V VCC − 0.5V V ICBO Input Leakage Current −10 µAV IN = VEE IEE Power Supply Current −67 −35 mA Symbol Parameter TC = 0°CTC = +25°CTC = +85°C Units Conditions Min Max Min Max Min Max fMAX Maximum Clock Frequency 750 750 750 MHz tPLH Propagation Delay CLKIN, ns Figures 1, 3 tPHL CLKIN to CLK(1–4), CLK(1–4) Differential 0.59 0.79 0.62 0.82 0.67 0.87 Single-Ended 0.59 0.99 0.62 1.02 0.67 1.07 tPLH Propagation Delay, TCLK 0.50 1.20 0.50 1.20 0.50 1.20 ns Figures 1, 2 tPHL to CLK(1–4), CLK(1–4) tPLH Propagation Delay, CLKSEL 0.80 1.60 0.80 1.60 0.80 1.60 ns Figures 1, 2 tPHL to CLK(1–4), CLK(1–4) tTLH Transition Time 0.30 0.80 0.30 0.80 0.30 0.80 ns Figures 1, 4 tTHL 20% to 80%, 80% to 20% tOST Maximum Skew Opposite Edge DIFF Output-to-Output Variation 50 50 50 ps (Note 5) Data to Output Path |
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